linux-kernel - [PATCH 5.4 3/4] x86/mm/pat: Don't flush cache if hardware enforces cache coherency across encryption domnains

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-Id: <20220311112927.8400-4-liam.merwick@oracle.com>
Date:   Fri, 11 Mar 2022 11:29:26 +0000
From:   Liam Merwick <liam.merwick@...cle.com>
To:     kvm@...r.kernel.org, linux-kernel@...r.kernel.org,
        stable@...r.kernel.org, x86@...nel.org
Cc:     pbonzini@...hat.com, bp@...en8.de, thomas.lendacky@....com,
        brijesh.singh@....com, krish.sadhukhan@...cle.com,
        liam.merwick@...cle.com
Subject: [PATCH 5.4 3/4] x86/mm/pat: Don't flush cache if hardware enforces cache coherency across encryption domnains

From: Krish Sadhukhan <krish.sadhukhan@...cle.com>

commit 75d1cc0e05af579301ce4e49cf6399be4b4e6e76 upstream.

In some hardware implementations, coherency between the encrypted and
unencrypted mappings of the same physical page is enforced. In such a
system, it is not required for software to flush the page from all CPU
caches in the system prior to changing the value of the C-bit for the
page. So check that bit before flushing the cache.

 [ bp: Massage commit message. ]

Suggested-by: Tom Lendacky <thomas.lendacky@....com>
Signed-off-by: Krish Sadhukhan <krish.sadhukhan@...cle.com>
Signed-off-by: Borislav Petkov <bp@...e.de>
Link: https://lkml.kernel.org/r/20200917212038.5090-3-krish.sadhukhan@oracle.com
Signed-off-by: Liam Merwick <liam.merwick@...cle.com>
---
 arch/x86/mm/pageattr.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/mm/pageattr.c b/arch/x86/mm/pageattr.c
index 281e584cfe39..d61313f5c5b9 100644
--- a/arch/x86/mm/pageattr.c
+++ b/arch/x86/mm/pageattr.c
@@ -1967,7 +1967,7 @@ static int __set_memory_enc_dec(unsigned long addr, int numpages, bool enc)
 	/*
 	 * Before changing the encryption attribute, we need to flush caches.
 	 */
-	cpa_flush(&cpa, 1);
+	cpa_flush(&cpa, !this_cpu_has(X86_FEATURE_SME_COHERENT));
 
 	ret = __change_page_attr_set_clr(&cpa, 1);
 
-- 
2.27.0