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Message-ID: <CAK8P3a3a_WXbDKN-jJUt_Wuvop0rfaUs4ytwyhogOxdtJAPx0w@mail.gmail.com>
Date: Fri, 11 Mar 2022 14:38:03 +0100
From: Arnd Bergmann <arnd@...db.de>
To: Vladimir Zapolskiy <vz@...ia.com>
Cc: Kuldeep Singh <singh.kuldeep87k@...il.com>,
Arnd Bergmann <arnd@...db.de>, Olof Johansson <olof@...om.net>,
SoC Team <soc@...nel.org>, Rob Herring <robh+dt@...nel.org>,
DTML <devicetree@...r.kernel.org>,
Linux ARM <linux-arm-kernel@...ts.infradead.org>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v2 3/3] ARM: dts: lpc32xx: Update spi clock properties
On Fri, Mar 11, 2022 at 2:20 PM Vladimir Zapolskiy <vz@...ia.com> wrote:
>
> On 3/11/22 11:38 AM, Kuldeep Singh wrote:
> > PL022 binding require two clocks to be defined but lpc platform doesn't
> > comply with bindings and define only one clock i.e apb_pclk.
> >
> > Update spi clocks and clocks-names property by adding appropriate clock
> > reference to make it compliant with bindings.
> >
> > CC: Vladimir Zapolskiy <vz@...ia.com>
> > Signed-off-by: Kuldeep Singh <singh.kuldeep87k@...il.com>
> > ---
> > v2:
> > - New patch with similar changeset
> > - Send to soc ML
> >
> > arch/arm/boot/dts/lpc32xx.dtsi | 8 ++++----
> > 1 file changed, 4 insertions(+), 4 deletions(-)
> >
> > diff --git a/arch/arm/boot/dts/lpc32xx.dtsi b/arch/arm/boot/dts/lpc32xx.dtsi
> > index c87066d6c995..30958e02d5e2 100644
> > --- a/arch/arm/boot/dts/lpc32xx.dtsi
> > +++ b/arch/arm/boot/dts/lpc32xx.dtsi
> > @@ -178,8 +178,8 @@ ssp0: spi@...84000 {
> > compatible = "arm,pl022", "arm,primecell";
> > reg = <0x20084000 0x1000>;
> > interrupts = <20 IRQ_TYPE_LEVEL_HIGH>;
> > - clocks = <&clk LPC32XX_CLK_SSP0>;
> > - clock-names = "apb_pclk";
> > + clocks = <&clk LPC32XX_CLK_SSP0>, <&clk LPC32XX_CLK_SSP0>;
> > + clock-names = "sspclk", "apb_pclk";
>
> In fact I'm uncertain if it is the right change, could it happen that the commit
> cc0f6e96c4fd ("spi: dt-bindings: Convert Arm pl022 to json-schema") sets a wrong
> schema pattern?
Good pointm this doesn't quite seem right: it is unlikely that the same clock
is used for both the SPI bus and the APB bus.
> Apparently just one clock is wanted on all observed platforms and cases, this
> is implicitly confirmed by clock handling in the drivers/spi/spi-pl022.c :
>
> pl022->clk = devm_clk_get(&adev->dev, NULL);
>
> So, I would vote to fix the device tree bindings schema.
Isn't this just using the wrong name? The name of the macro
LPC32XX_CLK_SSP0 might indicate that this is indeed the SPI clock
rather than the APB clock, so we only need to change clock-names
property here and leave it unchanged otherwise.
Looking at the driver, I also see that this refers to the clock as
"SSP/SPI bus clock", and it reads the rate from that.
In case of the LG platform, my impression is that the clocks listed
in DT don't reflect the system at all, they all refer to the same
fixed clock node at 198000000HZ, which is also used as for the
UART and timer nodes. Changing the name on that one doesn't
really make it correct, but should not hurt either.
Arnd
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