[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-Id: <20220313152924.61931-4-michael@walle.cc>
Date: Sun, 13 Mar 2022 16:29:19 +0100
From: Michael Walle <michael@...le.cc>
To: Linus Walleij <linus.walleij@...aro.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski@...onical.com>,
Lars Povlsen <lars.povlsen@...rochip.com>,
Steen Hegelund <Steen.Hegelund@...rochip.com>,
Thomas Bogendoerfer <tsbogend@...ha.franken.de>,
Gregory CLEMENT <gregory.clement@...tlin.com>,
Paul Burton <paulburton@...nel.org>,
Quentin Schulz <quentin.schulz@...tlin.com>,
Antoine Tenart <atenart@...nel.org>,
Kavyasree Kotagiri <kavyasree.kotagiri@...rochip.com>,
Nicolas Ferre <nicolas.ferre@...rochip.com>
Cc: "David S . Miller" <davem@...emloft.net>,
UNGLinuxDriver@...rochip.com, linux-gpio@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-mips@...r.kernel.org,
Michael Walle <michael@...le.cc>
Subject: [PATCH v1 3/8] MIPS: mscc: ocelot: fix PHY interrupt pinctrl node name
The pinctrl device tree binding will be converted to YAML format. All
the pin nodes should end with "-pins". Fix them.
Fixes: 116edf6e5239 ("MIPS: mscc: add DT for Ocelot PCB120")
Signed-off-by: Michael Walle <michael@...le.cc>
---
arch/mips/boot/dts/mscc/ocelot_pcb120.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/mips/boot/dts/mscc/ocelot_pcb120.dts b/arch/mips/boot/dts/mscc/ocelot_pcb120.dts
index 9d6b5717befb..cda6c5ff58ad 100644
--- a/arch/mips/boot/dts/mscc/ocelot_pcb120.dts
+++ b/arch/mips/boot/dts/mscc/ocelot_pcb120.dts
@@ -22,7 +22,7 @@ memory@0 {
};
&gpio {
- phy_int_pins: phy_int_pins {
+ phy_int_pins: phy-int-pins {
pins = "GPIO_4";
function = "gpio";
};
--
2.30.2
Powered by blists - more mailing lists