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Message-ID: <f394b9fd-443b-953c-3c4b-596ae4348a58@intel.com>
Date: Mon, 14 Mar 2022 15:38:12 +0200
From: Adrian Hunter <adrian.hunter@...el.com>
To: Ben Chuang <benchuanggli@...il.com>, ulf.hansson@...aro.org
Cc: linux-mmc@...r.kernel.org, linux-kernel@...r.kernel.org,
greg.tu@...esyslogic.com.tw, ben.chuang@...esyslogic.com.tw,
SeanHY.Chen@...esyslogic.com.tw, hl.liu@...esyslogic.com.tw,
Kevin Chang <kevin.chang@...uturecenter.com>
Subject: Re: [PATCH V2] mmc: sdhci-pci-gli: Add runtime PM for GL9763E
On 07/03/2022 11:00, Ben Chuang wrote:
> From: Ben Chuang <ben.chuang@...esyslogic.com.tw>
>
> Add runtime PM for GL9763E and disable PLL in runtime suspend. So power
> gated of upstream port can be enabled. GL9763E has an auxiliary power
> so it keep states in runtime suspend. In runtime resume, PLL is enabled
> and waits for it to stabilize.
>
> Signed-off-by: Ben Chuang <ben.chuang@...esyslogic.com.tw>
> Tested-by: Kevin Chang <kevin.chang@...uturecenter.com>
Acked-by: Adrian Hunter <adrian.hunter@...el.com>
> ---
> Changes in v2:
> * modify commit messages
> * Use read_poll_timeout() instead of while loop
> ---
> drivers/mmc/host/sdhci-pci-gli.c | 47 ++++++++++++++++++++++++++++++++
> 1 file changed, 47 insertions(+)
>
> diff --git a/drivers/mmc/host/sdhci-pci-gli.c b/drivers/mmc/host/sdhci-pci-gli.c
> index 97035d77c18c..c854c8db32e4 100644
> --- a/drivers/mmc/host/sdhci-pci-gli.c
> +++ b/drivers/mmc/host/sdhci-pci-gli.c
> @@ -13,6 +13,7 @@
> #include <linux/mmc/mmc.h>
> #include <linux/delay.h>
> #include <linux/of.h>
> +#include <linux/iopoll.h>
> #include "sdhci.h"
> #include "sdhci-pci.h"
> #include "cqhci.h"
> @@ -873,6 +874,47 @@ static void gli_set_gl9763e(struct sdhci_pci_slot *slot)
> pci_write_config_dword(pdev, PCIE_GLI_9763E_VHS, value);
> }
>
> +#ifdef CONFIG_PM
> +static int gl9763e_runtime_suspend(struct sdhci_pci_chip *chip)
> +{
> + struct sdhci_pci_slot *slot = chip->slots[0];
> + struct sdhci_host *host = slot->host;
> + u16 clock;
> +
> + clock = sdhci_readw(host, SDHCI_CLOCK_CONTROL);
> + clock &= ~(SDHCI_CLOCK_PLL_EN | SDHCI_CLOCK_CARD_EN);
> + sdhci_writew(host, clock, SDHCI_CLOCK_CONTROL);
> +
> + return 0;
> +}
> +
> +static int gl9763e_runtime_resume(struct sdhci_pci_chip *chip)
> +{
> + struct sdhci_pci_slot *slot = chip->slots[0];
> + struct sdhci_host *host = slot->host;
> + u16 clock;
> +
> + clock = sdhci_readw(host, SDHCI_CLOCK_CONTROL);
> +
> + clock |= SDHCI_CLOCK_PLL_EN;
> + clock &= ~SDHCI_CLOCK_INT_STABLE;
> + sdhci_writew(host, clock, SDHCI_CLOCK_CONTROL);
> +
> + /* Wait max 150 ms */
> + if (read_poll_timeout(sdhci_readw, clock, (clock & SDHCI_CLOCK_INT_STABLE),
> + 1000, 150000, false, host, SDHCI_CLOCK_CONTROL)) {
> + pr_err("%s: PLL clock never stabilised.\n",
> + mmc_hostname(host->mmc));
> + sdhci_dumpregs(host);
> + }
> +
> + clock |= SDHCI_CLOCK_CARD_EN;
> + sdhci_writew(host, clock, SDHCI_CLOCK_CONTROL);
> +
> + return 0;
> +}
> +#endif
> +
> static int gli_probe_slot_gl9763e(struct sdhci_pci_slot *slot)
> {
> struct pci_dev *pdev = slot->chip->pdev;
> @@ -982,6 +1024,11 @@ const struct sdhci_pci_fixes sdhci_gl9763e = {
> #ifdef CONFIG_PM_SLEEP
> .resume = sdhci_cqhci_gli_resume,
> .suspend = sdhci_cqhci_gli_suspend,
> +#endif
> +#ifdef CONFIG_PM
> + .runtime_suspend = gl9763e_runtime_suspend,
> + .runtime_resume = gl9763e_runtime_resume,
> + .allow_runtime_pm = true,
> #endif
> .add_host = gl9763e_add_host,
> };
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