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Message-ID: <20220314135537.1565-1-mario.limonciello@amd.com>
Date:   Mon, 14 Mar 2022 08:55:37 -0500
From:   Mario Limonciello <mario.limonciello@....com>
To:     <mario.limonciello@....com>, Keith Busch <kbusch@...nel.org>,
        Jens Axboe <axboe@...com>, Christoph Hellwig <hch@....de>,
        Sagi Grimberg <sagi@...mberg.me>,
        "open list:NVM EXPRESS DRIVER" <linux-nvme@...ts.infradead.org>,
        open list <linux-kernel@...r.kernel.org>
CC:     Patrick Huang <patrick.huang@....com>
Subject: [PATCH] nvme-pci: Disable LTR for simple suspend

Some drives from SSSTC are showing stability problems after s0i3
entry when the Linux kernel is in s2idle loop if LTR has been
enabled. This leads to failures to resume.

This appears to be a firmware issue specific to SSSTC SSDs, but to
avoid this class of problem, disable LTR when going into s2idle and
simple suspend has been set.

Co-developed-by: Patrick Huang <patrick.huang@....com>
Signed-off-by: Patrick Huang <patrick.huang@....com>
Signed-off-by: Mario Limonciello <mario.limonciello@....com>
---
 drivers/nvme/host/pci.c | 25 +++++++++++++++++++++++++
 1 file changed, 25 insertions(+)

diff --git a/drivers/nvme/host/pci.c b/drivers/nvme/host/pci.c
index 6a99ed680915..8d193c0842ed 100644
--- a/drivers/nvme/host/pci.c
+++ b/drivers/nvme/host/pci.c
@@ -139,6 +139,7 @@ struct nvme_dev {
 	struct nvme_ctrl ctrl;
 	u32 last_ps;
 	bool hmb;
+	bool restore_ltr;
 
 	mempool_t *iod_mempool;
 
@@ -3214,11 +3215,30 @@ static int nvme_set_power_state(struct nvme_ctrl *ctrl, u32 ps)
 	return nvme_set_features(ctrl, NVME_FEAT_POWER_MGMT, ps, NULL, 0, NULL);
 }
 
+static void nvme_suspend_ltr(struct device *dev, bool disable)
+{
+	struct pci_dev *pdev = to_pci_dev(dev);
+	struct nvme_dev *ndev = pci_get_drvdata(pdev);
+
+	if (disable) {
+		u16 word;
+
+		pcie_capability_read_word(pdev, PCI_EXP_DEVCTL2, &word);
+		ndev->restore_ltr = word & PCI_EXP_DEVCTL2_LTR_EN;
+		pcie_capability_clear_word(pdev, PCI_EXP_DEVCTL2,
+					   PCI_EXP_DEVCTL2_LTR_EN);
+	} else if (ndev->restore_ltr) {
+		pcie_capability_set_word(pdev, PCI_EXP_DEVCTL2,
+					 PCI_EXP_DEVCTL2_LTR_EN);
+	}
+}
+
 static int nvme_resume(struct device *dev)
 {
 	struct nvme_dev *ndev = pci_get_drvdata(to_pci_dev(dev));
 	struct nvme_ctrl *ctrl = &ndev->ctrl;
 
+	nvme_suspend_ltr(dev, false);
 	if (ndev->last_ps == U32_MAX ||
 	    nvme_set_power_state(ctrl, ndev->last_ps) != 0)
 		goto reset;
@@ -3239,6 +3259,11 @@ static int nvme_suspend(struct device *dev)
 
 	ndev->last_ps = U32_MAX;
 
+	/* If using s2idle with simple suspend, disable LTR to avoid problems. */
+	if (pm_suspend_target_state == PM_SUSPEND_TO_IDLE &&
+	    ndev->ctrl.quirks & NVME_QUIRK_SIMPLE_SUSPEND)
+		nvme_suspend_ltr(dev, true);
+
 	/*
 	 * The platform does not remove power for a kernel managed suspend so
 	 * use host managed nvme power settings for lowest idle power if
-- 
2.34.1

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