lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Date:   Mon, 14 Mar 2022 14:04:11 +0800
From:   Xin Ji <xji@...logixsemi.com>
To:     Sam Ravnborg <sam@...nborg.org>
Cc:     Andrzej Hajda <andrzej.hajda@...el.com>,
        Neil Armstrong <narmstrong@...libre.com>,
        Robert Foss <robert.foss@...aro.org>,
        Laurent Pinchart <Laurent.pinchart@...asonboard.com>,
        Jonas Karlman <jonas@...boo.se>,
        Jernej Skrabec <jernej.skrabec@...il.com>,
        David Airlie <airlied@...ux.ie>,
        Daniel Vetter <daniel@...ll.ch>, qwen@...logixsemi.com,
        linux-kernel@...r.kernel.org, dri-devel@...ts.freedesktop.org,
        mliu@...logixsemi.com, hsinyi@...omium.org, bliang@...logixsemi.com
Subject: Re: [PATCH v2] drm/bridge: anx7625: Fix not correct get property
 counts

On Fri, Mar 11, 2022 at 12:36:09PM +0100, Sam Ravnborg wrote:
> Hi Xin.
> 
> On Fri, Mar 11, 2022 at 06:35:25PM +0800, Xin Ji wrote:
> > The property length which returns from "of_get_property", it means array
> > bytes count if the property has prefix as "/bits/ 8". The driver should
> > call function "of_property_read_u8_array" to get correct array value.
> > 
> > Fixes: fd0310b6fe7d ("drm/bridge: anx7625: add MIPI DPI input feature")
> > Signed-off-by: Xin Ji <xji@...logixsemi.com>
> > 
> > ---
> > V1 -> V2: Fix Sam comment, use of_property_read_u8_array to get array
> > value
> > ---
> >  drivers/gpu/drm/bridge/analogix/anx7625.c | 8 ++++----
> >  drivers/gpu/drm/bridge/analogix/anx7625.h | 4 ++--
> >  2 files changed, 6 insertions(+), 6 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/bridge/analogix/anx7625.c b/drivers/gpu/drm/bridge/analogix/anx7625.c
> > index c6a9a02ed762..628cbf769141 100644
> > --- a/drivers/gpu/drm/bridge/analogix/anx7625.c
> > +++ b/drivers/gpu/drm/bridge/analogix/anx7625.c
> > @@ -1598,8 +1598,8 @@ static int anx7625_get_swing_setting(struct device *dev,
> >  			num_regs = DP_TX_SWING_REG_CNT;
> >  
> >  		pdata->dp_lane0_swing_reg_cnt = num_regs;
> > -		of_property_read_u32_array(dev->of_node, "analogix,lane0-swing",
> > -					   pdata->lane0_reg_data, num_regs);
> > +		of_property_read_u8_array(dev->of_node, "analogix,lane0-swing",
> > +					  pdata->lane0_reg_data, num_regs);
> 
> The current implementation do a two step approach. First is find the
> number of elements and then read the elements.
> The number of elements is only used to limit what is read.
> 
> I suggest to use:
> 
> of_property_read_u8_array(dev->of_node, "analogix,lane0-swing",
> 			  pdata->lane0_reg_data, DP_TX_SWING_REG_CNT);
> 
> Then you a guaranteed to read at maximum DP_TX_SWING_REG_CNT entries.
> And as the number of elements is not stored anywhere that should be fine.
> 
> This looks simpler and matches what we for example do in
> drivers/gpu/drm/arm/malidp_drv.c - the only user in gpu/ of
> of_property_read_u8_array().
Hi Sam, the property is variable, so need two steps to approach, first
to get the property length, then to read the elements (the property
length may between 1 to DP_TX_SWING_REG_CNT). If directly to read the
element, I cannot exactly know how many registers need by configred.

Thanks,
Xin
> 
> 
> 	Sam

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ