linux-kernel - RE: [PATCH v3 1/2] dt-bindings: PCI: xilinx-cpm: Add Versal CPM5 Root Port

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Message-ID: <BY5PR02MB694719773875D2A544EC6BD1A50F9@BY5PR02MB6947.namprd02.prod.outlook.com>
Date:   Mon, 14 Mar 2022 04:33:18 +0000
From:   Bharat Kumar Gogada <bharatku@...inx.com>
To:     Rob Herring <robh@...nel.org>
CC:     PCI <linux-pci@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        Lorenzo Pieralisi <lorenzo.pieralisi@....com>,
        Bjorn Helgaas <bhelgaas@...gle.com>,
        Michal Simek <michals@...inx.com>
Subject: RE: [PATCH v3 1/2] dt-bindings: PCI: xilinx-cpm: Add Versal CPM5 Root
 Port

> On Wed, Mar 9, 2022 at 6:00 AM Bharat Kumar Gogada
> <bharat.kumar.gogada@...inx.com> wrote:
> >
> > Xilinx Versal Premium series has CPM5 block which supports Root Port
> > functioning at Gen5 speed.
> >
> > Add support for YAML schemas documentation for Versal CPM5 Root Port
> driver.
> >
> > Signed-off-by: Bharat Kumar Gogada <bharat.kumar.gogada@...inx.com>
> > ---
> >  .../bindings/pci/xilinx-versal-cpm.yaml       | 47 ++++++++++++++++---
> >  1 file changed, 40 insertions(+), 7 deletions(-)
> >
> > diff --git
> > a/Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml
> > b/Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml
> > index 32f4641085bc..97c7229d7f91 100644
> > --- a/Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml
> > +++ b/Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml
> > @@ -14,17 +14,21 @@ allOf:
> >
> >  properties:
> >    compatible:
> > -    const: xlnx,versal-cpm-host-1.00
> > +    contains:
> 
> Nope. That means 'compatible = "foo", "xlnx,versal-cpm-host-1.00", "bar";'
> would be valid.
> 
> > +      enum:
> > +        - xlnx,versal-cpm-host-1.00
> > +        - xlnx,versal-cpm5-host-1.00
> 
> Where does 1.00 come from? My guess is you or whoever did the original
> binding just made it up. Version numbers are only used when they
> correspond to something documented for the h/w. In the case of Xilinx, that
> should be soft IP (which I assume has versioned releases) and nothing else. If
> 'versal' is not specific enough to identify a specific SoC, then add to it.
> 
Agreed, will remove version numbers.
> 
> >    reg:
> > -    items:
> > -      - description: Configuration space region and bridge registers.
> > -      - description: CPM system level control and status registers.
> > +    description: |
> > +      Should contain cpm_slcr, cfg registers location and length.
> > +      For xlnx,versal-cpm5-host-1.00, it should also contain cpm_csr.
> 
> Not an improvement in defining what each entry is.
Agreed, will fix this in next patch.

regards,
Bharat