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Message-ID: <7b78853e-71ec-7c57-4cac-5cd6303f3b13@alliedtelesis.co.nz>
Date: Tue, 15 Mar 2022 02:11:56 +0000
From: Chris Packham <Chris.Packham@...iedtelesis.co.nz>
To: Andrew Lunn <andrew@...n.ch>
CC: "robh+dt@...nel.org" <robh+dt@...nel.org>,
"gregory.clement@...tlin.com" <gregory.clement@...tlin.com>,
"sebastian.hesselbarth@...il.com" <sebastian.hesselbarth@...il.com>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH v2 7/8] arm64: dts: marvell: Add Armada 98DX2530 SoC and
RD-AC5X board
On 15/03/22 13:24, Andrew Lunn wrote:
>> diff --git a/arch/arm64/boot/dts/marvell/armada-98dx2530.dtsi b/arch/arm64/boot/dts/marvell/armada-98dx2530.dtsi
>> new file mode 100644
>> index 000000000000..ebe464b9ebd2
>> --- /dev/null
>> +++ b/arch/arm64/boot/dts/marvell/armada-98dx2530.dtsi
>> @@ -0,0 +1,343 @@
>> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
>> +/*
>> + * Device Tree For AC5.
>> + *
>> + * Copyright (C) 2021 Marvell
>> + *
>> + */
>> +
>> +/dts-v1/;
>> + memory@0 {
>> + device_type = "memory";
>> + reg = <0x2 0x00000000 0x0 0x40000000>;
>> + // linux,usable-memory = <0x2 0x00000000 0x0 0x80000000>;
>> + };
> Is the memory part of the SoC, or is it on the board? Normally it is
> on the board, so should be in the .dts file. But Apple M1 etc...
It's on the board. Marvell's SDK conflates the SoC and the common
elements between their board designs (hence the SPI and Ethernet stuff
in v1). I'll move it for the next round.
I also wasn't sure about linux,usable-memory. It's commented out so it's
obviously doing nothing but should it? No other in-tree dts files have it.
>> +&mdio {
>> + phy0: ethernet-phy@0 {
>> + reg = <0 0>;
> phy reg values are a single number, the address on the bus, in the
> range 0 to 31.
Will fix.
> Andrew
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