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Message-ID: <YjDr1F+/xVAtOAKv@zn.tnic>
Date: Tue, 15 Mar 2022 20:41:08 +0100
From: Borislav Petkov <bp@...en8.de>
To: "Kirill A. Shutemov" <kirill.shutemov@...ux.intel.com>
Cc: dave.hansen@...el.com, aarcange@...hat.com, ak@...ux.intel.com,
brijesh.singh@....com, dan.j.williams@...el.com, david@...hat.com,
hpa@...or.com, jgross@...e.com, jmattson@...gle.com,
joro@...tes.org, jpoimboe@...hat.com, knsathya@...nel.org,
linux-kernel@...r.kernel.org, luto@...nel.org, mingo@...hat.com,
pbonzini@...hat.com, peterz@...radead.org,
sathyanarayanan.kuppuswamy@...ux.intel.com, sdeep@...are.com,
seanjc@...gle.com, tglx@...utronix.de, thomas.lendacky@....com,
tony.luck@...el.com, vkuznets@...hat.com, wanpengli@...cent.com,
x86@...nel.org
Subject: Re: [PATCHv5.2 04/30] x86/tdx: Extend the confidential computing API
to support TDX guests
On Thu, Mar 10, 2022 at 02:51:21AM +0300, Kirill A. Shutemov wrote:
> diff --git a/arch/x86/coco/core.c b/arch/x86/coco/core.c
> index fc1365dd927e..6529db059938 100644
> --- a/arch/x86/coco/core.c
> +++ b/arch/x86/coco/core.c
> @@ -87,9 +87,18 @@ EXPORT_SYMBOL_GPL(cc_platform_has);
>
> u64 cc_mkenc(u64 val)
> {
> + /*
> + * Both AMD and Intel use a bit in page table to indicate encryption
"... a bit in the page table ..."
> + * status of the page.
> + *
> + * - for AMD, bit *set* means the page is encrypted
> + * - for Intel *clear* means encrypted.
> + */
> switch (vendor) {
> case CC_VENDOR_AMD:
> return val | cc_mask;
> + case CC_VENDOR_INTEL:
> + return val & ~cc_mask;
> default:
> return val;
> }
With that fixed:
Reviewed-by: Borislav Petkov <bp@...e.de>
--
Regards/Gruss,
Boris.
https://people.kernel.org/tglx/notes-about-netiquette
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