lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Wed, 16 Mar 2022 11:31:39 +0800
From:   CK Hu <ck.hu@...iatek.com>
To:     Moudy Ho <moudy.ho@...iatek.com>,
        Mauro Carvalho Chehab <mchehab@...nel.org>,
        Rob Herring <robh+dt@...nel.org>,
        Matthias Brugger <matthias.bgg@...il.com>,
        Hans Verkuil <hverkuil-cisco@...all.nl>,
        "Jernej Skrabec" <jernej.skrabec@...l.net>
CC:     Chun-Kuang Hu <chunkuang.hu@...nel.org>,
        Geert Uytterhoeven <geert+renesas@...der.be>,
        Rob Landley <rob@...dley.net>,
        Laurent Pinchart <laurent.pinchart@...asonboard.com>,
        <linux-media@...r.kernel.org>, <devicetree@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        <linux-mediatek@...ts.infradead.org>,
        <linux-kernel@...r.kernel.org>,
        "Alexandre Courbot" <acourbot@...omium.org>, <tfiga@...omium.org>,
        <drinkcat@...omium.org>, <pihsun@...omium.org>,
        <hsinyi@...gle.com>,
        AngeloGioacchino Del Regno 
        <angelogioacchino.delregno@...labora.com>,
        Maoguang Meng <maoguang.meng@...iatek.com>,
        daoyuan huang <daoyuan.huang@...iatek.com>,
        Ping-Hsun Wu <ping-hsun.wu@...iatek.com>,
        <menghui.lin@...iatek.com>, <sj.huang@...iatek.com>,
        <allen-kh.cheng@...iatek.com>, <randy.wu@...iatek.com>,
        <jason-jh.lin@...iatek.com>, <roy-cw.yeh@...iatek.com>,
        <river.cheng@...iatek.com>, <srv_heupstream@...iatek.com>,
        <Project_Global_Chrome_Upstream_Group@...iatek.com>
Subject: Re: [PATCH v13 2/6] soc: mediatek: mutex: add 8183 MUTEX MOD
 settings for MDP

Hi, Moudy:

On Tue, 2022-03-15 at 14:10 +0800, Moudy Ho wrote:
> For the purpose of module independence, related settings should be
> moved
> from MDP to the corresponding driver.
> This patch adds 8183 MUTEX MOD settings for MDP.
> 
> Signed-off-by: Moudy Ho <moudy.ho@...iatek.com>
> ---
>  drivers/soc/mediatek/mtk-mutex.c | 21 +++++++++++++++++++++
>  1 file changed, 21 insertions(+)
> 
> diff --git a/drivers/soc/mediatek/mtk-mutex.c
> b/drivers/soc/mediatek/mtk-mutex.c
> index 778b01ce9e8f..88fb4fc8f216 100644
> --- a/drivers/soc/mediatek/mtk-mutex.c
> +++ b/drivers/soc/mediatek/mtk-mutex.c
> @@ -80,6 +80,15 @@
>  #define MT8183_MUTEX_MOD_DISP_GAMMA0		16
>  #define MT8183_MUTEX_MOD_DISP_DITHER0		17
>  
> +#define MT8183_MUTEX_MOD_MDP_RDMA0		BIT(2)

Display definition is a number, why MDP is bit definition?

Regards,
CK

> +#define MT8183_MUTEX_MOD_MDP_RSZ0		BIT(4)
> +#define MT8183_MUTEX_MOD_MDP_RSZ1		BIT(5)
> +#define MT8183_MUTEX_MOD_MDP_TDSHP0		BIT(6)
> +#define MT8183_MUTEX_MOD_MDP_WROT0		BIT(7)
> +#define MT8183_MUTEX_MOD_MDP_WDMA		BIT(8)
> +#define MT8183_MUTEX_MOD_MDP_AAL0		BIT(23)
> +#define MT8183_MUTEX_MOD_MDP_CCORR0		BIT(24)
> +
>  #define MT8173_MUTEX_MOD_DISP_OVL0		11
>  #define MT8173_MUTEX_MOD_DISP_OVL1		12
>  #define MT8173_MUTEX_MOD_DISP_RDMA0		13
> @@ -244,6 +253,17 @@ static const unsigned int
> mt8183_mutex_mod[DDP_COMPONENT_ID_MAX] = {
>  	[DDP_COMPONENT_WDMA0] = MT8183_MUTEX_MOD_DISP_WDMA0,
>  };
>  
> 

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ