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Message-Id: <1647411447-25249-2-git-send-email-quic_rohiagar@quicinc.com>
Date: Wed, 16 Mar 2022 11:47:22 +0530
From: Rohit Agarwal <quic_rohiagar@...cinc.com>
To: agross@...nel.org, bjorn.andersson@...aro.org, robh+dt@...nel.org
Cc: linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org,
Rohit Agarwal <quic_rohiagar@...cinc.com>
Subject: [PATCH 1/6] ARM: dts: qcom: sdx65: Add spmi node
Add SPMI node to SDX65 dtsi.
Signed-off-by: Rohit Agarwal <quic_rohiagar@...cinc.com>
---
arch/arm/boot/dts/qcom-sdx65.dtsi | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom-sdx65.dtsi
index 1457912..ba7b6c5 100644
--- a/arch/arm/boot/dts/qcom-sdx65.dtsi
+++ b/arch/arm/boot/dts/qcom-sdx65.dtsi
@@ -91,6 +91,25 @@
status = "disabled";
};
+ spmi_bus: qcom,spmi@...0000 {
+ compatible = "qcom,spmi-pmic-arb";
+ reg = <0xc440000 0xd00>,
+ <0xc600000 0x2000000>,
+ <0xe600000 0x100000>,
+ <0xe700000 0xa0000>,
+ <0xc40a000 0x26000>;
+ reg-names = "core", "chnls", "obsrvr", "intr", "cnfg";
+ interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "periph_irq";
+ interrupt-controller;
+ #interrupt-cells = <4>;
+ #address-cells = <2>;
+ #size-cells = <0>;
+ cell-index = <0>;
+ qcom,channel = <0>;
+ qcom,ee = <0>;
+ };
+
tlmm: pinctrl@...0000 {
compatible = "qcom,sdx65-tlmm";
reg = <0xf100000 0x300000>;
--
2.7.4
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