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Message-Id: <1647532165-6302-2-git-send-email-quic_c_sbhanu@quicinc.com>
Date: Thu, 17 Mar 2022 21:19:24 +0530
From: Shaik Sajida Bhanu <quic_c_sbhanu@...cinc.com>
To: ulf.hansson@...aro.org, robh+dt@...nel.org, krzk+dt@...nel.org,
linux-mmc@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, agross@...nel.org,
bjorn.andersson@...aro.org, linux-arm-msm@...r.kernel.org
Cc: quic_rampraka@...cinc.com, quic_pragalla@...cinc.com,
quic_sartgarg@...cinc.com, quic_nitirawa@...cinc.com,
quic_sayalil@...cinc.com,
Shaik Sajida Bhanu <quic_c_sbhanu@...cinc.com>
Subject: [PATCH V3 1/2] dt-bindings: mmc: sdhci-msm: Add gcc resets strings
Add gcc hardware reset supported strings for qcom-sdhci controller.
Signed-off-by: Shaik Sajida Bhanu <quic_c_sbhanu@...cinc.com>
---
Documentation/devicetree/bindings/mmc/sdhci-msm.txt | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
index 6216ed7..f180111 100644
--- a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
+++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
@@ -62,6 +62,10 @@ Required properties:
- qcom,dll-config: Chipset and Platform specific value. Use this field to
specify the DLL_CONFIG register value as per Hardware Programming Guide.
+- resets: Phandle and reset specifier for the device's reset.
+- reset-names: List of reset signal name strings sorted in the same order as
+ the resets property.
+
Optional Properties:
* Following bus parameters are required for interconnect bandwidth scaling:
- interconnects: Pairs of phandles and interconnect provider specifier
--
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