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Message-ID: <87czil303j.ffs@tglx>
Date:   Thu, 17 Mar 2022 01:16:00 +0100
From:   Thomas Gleixner <tglx@...utronix.de>
To:     "Kirill A. Shutemov" <kirill.shutemov@...ux.intel.com>,
        mingo@...hat.com, bp@...en8.de, dave.hansen@...el.com,
        luto@...nel.org, peterz@...radead.org
Cc:     sathyanarayanan.kuppuswamy@...ux.intel.com, aarcange@...hat.com,
        ak@...ux.intel.com, dan.j.williams@...el.com, david@...hat.com,
        hpa@...or.com, jgross@...e.com, jmattson@...gle.com,
        joro@...tes.org, jpoimboe@...hat.com, knsathya@...nel.org,
        pbonzini@...hat.com, sdeep@...are.com, seanjc@...gle.com,
        tony.luck@...el.com, vkuznets@...hat.com, wanpengli@...cent.com,
        thomas.lendacky@....com, brijesh.singh@....com, x86@...nel.org,
        linux-kernel@...r.kernel.org,
        "Kirill A. Shutemov" <kirill.shutemov@...ux.intel.com>
Subject: Re: [PATCHv6 05/30] x86/tdx: Exclude shared bit from __PHYSICAL_MASK

On Wed, Mar 16 2022 at 05:08, Kirill A. Shutemov wrote:
> @@ -82,6 +82,14 @@ void __init tdx_early_init(void)
>  
>  	cc_set_vendor(CC_VENDOR_INTEL);
>  
> +	/*
> +	 * All bits above GPA width are reserved and kernel treats shared bit
> +	 * as flag, not as part of physical address.
> +	 *
> +	 * Adjust physical mask to only cover valid GPA bits.
> +	 */
> +	physical_mask &= GENMASK_ULL(gpa_width - 2, 0);
> +

Hrm. I forgot about the second use case for gpa_width, but my comment
about ordering still stands. OTOH:

         GENMASK_ULL(gpa_width - 2, 0) == BIT_UL(gpa_width - 1) - 1

right? So you really can consolidate on the fact that cc_mask is a
single bit which is above the guests physical address space boundary.

I.e. make the code tell the story instead of adding lengthy comments
explaining the obfuscation.

Thanks,

        tglx

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