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Date: Thu, 17 Mar 2022 20:07:04 +0530 From: Srinivasa Rao Mandadapu <quic_srivasam@...cinc.com> To: <agross@...nel.org>, <bjorn.andersson@...aro.org>, <robh+dt@...nel.org>, <linux-arm-msm@...r.kernel.org>, <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>, <rohitkr@...eaurora.org>, <srinivas.kandagatla@...aro.org>, <dianders@...omium.org>, <swboyd@...omium.org>, <judyhsiao@...omium.org> CC: Srinivasa Rao Mandadapu <quic_srivasam@...cinc.com>, "Venkata Prasad Potturu" <quic_potturu@...cinc.com> Subject: [PATCH v4 2/3] arm64: dts: qcom: sc7280: Add pinmux for I2S speaker and Headset Add AMP enable node and pinmux for primary and secondary I2S for SC7280 based platforms. Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@...cinc.com> Co-developed-by: Venkata Prasad Potturu <quic_potturu@...cinc.com> Signed-off-by: Venkata Prasad Potturu <quic_potturu@...cinc.com> --- arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 41 ++++++++++++++++++++++++++++++++ arch/arm64/boot/dts/qcom/sc7280.dtsi | 41 ++++++++++++++++++++++++++++++++ 2 files changed, 82 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi index 688fa95..39c9f9b 100644 --- a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi @@ -375,6 +375,26 @@ drive-strength = <2>; }; +&pri_mi2s_data0 { + drive-strength = <6>; +}; + +&pri_mi2s_data1 { + drive-strength = <6>; +}; + +&pri_mi2s_mclk { + drive-strength = <6>; +}; + +&pri_mi2s_sclk { + drive-strength = <6>; +}; + +&pri_mi2s_ws { + drive-strength = <6>; +}; + &qspi_cs0 { bias-disable; }; @@ -462,7 +482,28 @@ drive-strength = <10>; }; +&sec_mi2s_data0 { + drive-strength = <6>; + bias-disable; +}; + +&sec_mi2s_sclk { + drive-strength = <6>; + bias-disable; +}; + +&sec_mi2s_ws { + drive-strength = <6>; +}; + &tlmm { + amp_en: amp-en { + pins = "gpio63"; + function = "gpio"; + bias-pull-down; + drive-strength = <2>; + }; + bt_en: bt-en { pins = "gpio85"; function = "gpio"; diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi index c07765d..acea8ab 100644 --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi @@ -3563,6 +3563,31 @@ function = "pcie1_clkreqn"; }; + pri_mi2s_data0: pri-mi2s-data0 { + pins = "gpio98"; + function = "mi2s0_data0"; + }; + + pri_mi2s_data1: pri-mi2s-data1 { + pins = "gpio99"; + function = "mi2s0_data1"; + }; + + pri_mi2s_mclk: pri-mi2s-mclk { + pins = "gpio96"; + function = "pri_mi2s"; + }; + + pri_mi2s_sclk: pri-mi2s-sclk { + pins = "gpio97"; + function = "mi2s0_sck"; + }; + + pri_mi2s_ws: pri-mi2s-ws { + pins = "gpio100"; + function = "mi2s0_ws"; + }; + qspi_clk: qspi-clk { pins = "gpio14"; function = "qspi_clk"; @@ -4297,6 +4322,22 @@ drive-strength = <2>; bias-bus-hold; }; + + sec_mi2s_data0: sec-mi2s-data0 { + pins = "gpio107"; + function = "mi2s1_data0"; + }; + + sec_mi2s_sclk: sec-mi2s-sclk { + pins = "gpio106"; + function = "mi2s1_sck"; + }; + + sec_mi2s_ws: sec-mi2s-ws { + pins = "gpio108"; + function = "mi2s1_ws"; + }; + }; imem@...a5000 { -- 2.7.4
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