linux-kernel - [PATCH v14 2/6] soc: mediatek: mutex: add 8183 MUTEX MOD settings for MDP

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Date:   Thu, 17 Mar 2022 22:39:22 +0800
From:   Moudy Ho <moudy.ho@...iatek.com>
To:     Mauro Carvalho Chehab <mchehab@...nel.org>,
        Rob Herring <robh+dt@...nel.org>,
        Matthias Brugger <matthias.bgg@...il.com>,
        Hans Verkuil <hverkuil-cisco@...all.nl>,
        Jernej Skrabec <jernej.skrabec@...l.net>
CC:     Chun-Kuang Hu <chunkuang.hu@...nel.org>,
        Geert Uytterhoeven <geert+renesas@...der.be>,
        Rob Landley <rob@...dley.net>,
        Laurent Pinchart <laurent.pinchart@...asonboard.com>,
        <linux-media@...r.kernel.org>, <devicetree@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        <linux-mediatek@...ts.infradead.org>,
        <linux-kernel@...r.kernel.org>,
        Alexandre Courbot <acourbot@...omium.org>,
        <tfiga@...omium.org>, <drinkcat@...omium.org>,
        <pihsun@...omium.org>, <hsinyi@...gle.com>,
        AngeloGioacchino Del Regno 
        <angelogioacchino.delregno@...labora.com>,
        Maoguang Meng <maoguang.meng@...iatek.com>,
        daoyuan huang <daoyuan.huang@...iatek.com>,
        Ping-Hsun Wu <ping-hsun.wu@...iatek.com>,
        <menghui.lin@...iatek.com>, <sj.huang@...iatek.com>,
        <allen-kh.cheng@...iatek.com>, <randy.wu@...iatek.com>,
        <moudy.ho@...iatek.com>, <jason-jh.lin@...iatek.com>,
        <roy-cw.yeh@...iatek.com>, <river.cheng@...iatek.com>,
        <srv_heupstream@...iatek.com>,
        <Project_Global_Chrome_Upstream_Group@...iatek.com>
Subject: [PATCH v14 2/6] soc: mediatek: mutex: add 8183 MUTEX MOD settings for MDP

For the purpose of module independence, related settings should be moved
from MDP to the corresponding driver.
This patch adds 8183 MUTEX MOD settings for MDP.

Signed-off-by: Moudy Ho <moudy.ho@...iatek.com>
---
 drivers/soc/mediatek/mtk-mutex.c | 37 ++++++++++++++++++++++++++++++++
 1 file changed, 37 insertions(+)

diff --git a/drivers/soc/mediatek/mtk-mutex.c b/drivers/soc/mediatek/mtk-mutex.c
index f8c33186685a..c72e9f6ee4cc 100644
--- a/drivers/soc/mediatek/mtk-mutex.c
+++ b/drivers/soc/mediatek/mtk-mutex.c
@@ -80,6 +80,15 @@
 #define MT8183_MUTEX_MOD_DISP_GAMMA0		16
 #define MT8183_MUTEX_MOD_DISP_DITHER0		17
 
+#define MT8183_MUTEX_MOD_MDP_RDMA0		2
+#define MT8183_MUTEX_MOD_MDP_RSZ0		4
+#define MT8183_MUTEX_MOD_MDP_RSZ1		5
+#define MT8183_MUTEX_MOD_MDP_TDSHP0		6
+#define MT8183_MUTEX_MOD_MDP_WROT0		7
+#define MT8183_MUTEX_MOD_MDP_WDMA		8
+#define MT8183_MUTEX_MOD_MDP_AAL0		23
+#define MT8183_MUTEX_MOD_MDP_CCORR0		24
+
 #define MT8173_MUTEX_MOD_DISP_OVL0		11
 #define MT8173_MUTEX_MOD_DISP_OVL1		12
 #define MT8173_MUTEX_MOD_DISP_RDMA0		13
@@ -249,6 +258,33 @@ static const unsigned int mt8183_mutex_mod[DDP_COMPONENT_ID_MAX] = {
 	[DDP_COMPONENT_WDMA0] = MT8183_MUTEX_MOD_DISP_WDMA0,
 };
 
+static const struct mtk_mutex_mod mt8183_mutex_table_mod[MUTEX_TABLE_IDX_MAX] = {
+	[MUTEX_TABLE_IDX_MDP_RDMA0] = {
+		0, MT8183_MUTEX_MOD_MDP_RDMA0
+	},
+	[MUTEX_TABLE_IDX_MDP_RSZ0] = {
+		0, MT8183_MUTEX_MOD_MDP_RSZ0
+	},
+	[MUTEX_TABLE_IDX_MDP_RSZ1] = {
+		0, MT8183_MUTEX_MOD_MDP_RSZ1
+	},
+	[MUTEX_TABLE_IDX_MDP_TDSHP0] = {
+		0, MT8183_MUTEX_MOD_MDP_TDSHP0
+	},
+	[MUTEX_TABLE_IDX_MDP_WROT0] = {
+		0, MT8183_MUTEX_MOD_MDP_WROT0
+	},
+	[MUTEX_TABLE_IDX_MDP_WDMA] = {
+		0, MT8183_MUTEX_MOD_MDP_WDMA
+	},
+	[MUTEX_TABLE_IDX_MDP_AAL0] = {
+		0, MT8183_MUTEX_MOD_MDP_AAL0
+	},
+	[MUTEX_TABLE_IDX_MDP_CCORR0] = {
+		0, MT8183_MUTEX_MOD_MDP_CCORR0
+	},
+};
+
 static const unsigned int mt8186_mutex_mod[DDP_COMPONENT_ID_MAX] = {
 	[DDP_COMPONENT_AAL0] = MT8186_MUTEX_MOD_DISP_AAL0,
 	[DDP_COMPONENT_CCORR] = MT8186_MUTEX_MOD_DISP_CCORR0,
@@ -340,6 +376,7 @@ static const struct mtk_mutex_data mt8183_mutex_driver_data = {
 	.mutex_sof = mt8183_mutex_sof,
 	.mutex_mod_reg = MT8183_MUTEX0_MOD0,
 	.mutex_sof_reg = MT8183_MUTEX0_SOF0,
+	.mutex_table_mod = mt8183_mutex_table_mod,
 	.no_clk = true,
 };
 
-- 
2.18.0