[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <4b017a7c75d6422b3e68df1d0aef49adc31ae991.camel@perches.com>
Date: Thu, 17 Mar 2022 20:41:08 -0700
From: Joe Perches <joe@...ches.com>
To: Atish Patra <atishp@...osinc.com>, linux-kernel@...r.kernel.org
Cc: Tsukasa OI <research_trasio@....a4lg.com>,
Anup Patel <anup@...infault.org>,
Heiko Stuebner <heiko@...ech.de>,
Albert Ou <aou@...s.berkeley.edu>,
Atish Patra <atishp@...shpatra.org>,
Damien Le Moal <damien.lemoal@....com>,
devicetree@...r.kernel.org, Jisheng Zhang <jszhang@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski@...onical.com>,
linux-riscv@...ts.infradead.org,
Palmer Dabbelt <palmer@...belt.com>,
Paul Walmsley <paul.walmsley@...ive.com>,
Rob Herring <robh+dt@...nel.org>
Subject: Re: [PATCH v6 1/6] RISC-V: Correctly print supported extensions
On Mon, 2022-03-14 at 13:38 -0700, Atish Patra wrote:
> From: Tsukasa OI <research_trasio@....a4lg.com>
>
> This commit replaces BITS_PER_LONG with number of alphabet letters.
[]
> diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c
[]
> @@ -133,13 +135,13 @@ void __init riscv_fill_hwcap(void)
> }
>
> memset(print_str, 0, sizeof(print_str));
> - for (i = 0, j = 0; i < BITS_PER_LONG; i++)
> + for (i = 0, j = 0; i < NUM_ALPHA_EXTS; i++)
> if (riscv_isa[0] & BIT_MASK(i))
> print_str[j++] = (char)('a' + i);
probably better to add braces for the for loops too
> pr_info("riscv: ISA extensions %s\n", print_str);
>
> memset(print_str, 0, sizeof(print_str));
> - for (i = 0, j = 0; i < BITS_PER_LONG; i++)
> + for (i = 0, j = 0; i < NUM_ALPHA_EXTS; i++)
> if (elf_hwcap & BIT_MASK(i))
> print_str[j++] = (char)('a' + i);
> pr_info("riscv: ELF capabilities %s\n", print_str);
and here.
Powered by blists - more mailing lists