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Message-ID: <OSBPR01MB2037E49B416A30182901F70C80139@OSBPR01MB2037.jpnprd01.prod.outlook.com>
Date: Fri, 18 Mar 2022 06:41:04 +0000
From: "tarumizu.kohei@...itsu.com" <tarumizu.kohei@...itsu.com>
To: 'Dave Hansen' <dave.hansen@...el.com>,
"catalin.marinas@....com" <catalin.marinas@....com>,
"will@...nel.org" <will@...nel.org>,
"tglx@...utronix.de" <tglx@...utronix.de>,
"mingo@...hat.com" <mingo@...hat.com>,
"bp@...en8.de" <bp@...en8.de>,
"dave.hansen@...ux.intel.com" <dave.hansen@...ux.intel.com>,
"x86@...nel.org" <x86@...nel.org>, "hpa@...or.com" <hpa@...or.com>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: RE: [PATCH v2 6/8] x86: Add hardware prefetch control support for x86
> > +static int broadwell_write_pfreg(enum pfctl_attr pattr, unsigned int cpu,
> > + unsigned int level, u64 val)
> > +{
> > + int ret;
> > + u64 reg;
> > +
> > + ret = rdmsrl_on_cpu(cpu, MSR_MISC_FEATURE_CONTROL, ®);
> > + if (ret)
> > + return ret;
> > +
> > + ret = broadwell_modify_pfreg(pattr, ®, level, val);
> > + if (ret < 0)
> > + return ret;
> > +
> > + ret = wrmsrl_on_cpu(cpu, MSR_MISC_FEATURE_CONTROL, reg);
> > + if (ret)
> > + return ret;
> > +
> > + return 0;
> > +}
>
> This needs to integrate _somehow_ with the pseudo_lock.c code. Right now, I
> suspect that code would just overwrite any MSR changes made by this code.
I lacked consideration for pseudo_lock.c code. I try to integration
with that code.
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