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Message-ID: <c11f65fb-a756-0233-791b-6ecc3d9f4f05@conchuod.ie>
Date:   Fri, 18 Mar 2022 12:33:04 +0000
From:   Conor Dooley <mail@...chuod.ie>
To:     conor.dooley@...rochip.com, mpm@...enic.com,
        herbert@...dor.apana.org.au
Cc:     lewis.hanly@...rochip.com, linux-kernel@...r.kernel.org,
        linux-crypto@...r.kernel.org, linux-riscv@...ts.infradead.org
Subject: Re: [PATCH 0/2] Add support for hwrng on PolarFire SoC

There's an error in the probe function's reference counting.
Will fix that along with the quality estimation in v2.

Can safely ignore this version of the series.

Thanks,
Conor.

On 07/03/2022 15:40, conor.dooley@...rochip.com wrote:
> From: Conor Dooley <conor.dooley@...rochip.com>
> 
> As it says on the tin, add support for the hardware rng on PolarFire
> SoC, which is accessed via the system controller. While we're at it,
> add the rng driver to the list of files included as part of the SoC
> support in MAINTAINERS.
> 
> Base commit is in arm/soc branch of the soc tree as the hwrng driver
> depends on the system controller, which is to be introduced via that
> tree in 5.18
> 
> Conor Dooley (2):
>    hwrng: mpfs - add polarfire soc hwrng support
>    MAINTAINERS: update PolarFire SoC support
> 
>   MAINTAINERS                       |   1 +
>   drivers/char/hw_random/Kconfig    |  13 ++++
>   drivers/char/hw_random/Makefile   |   1 +
>   drivers/char/hw_random/mpfs-rng.c | 103 ++++++++++++++++++++++++++++++
>   4 files changed, 118 insertions(+)
>   create mode 100644 drivers/char/hw_random/mpfs-rng.c
> 
> 
> base-commit: a483b1b232e616d0095a59b987ffc739bc1b56bc

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