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Message-ID: <87a6dncphl.ffs@tglx>
Date:   Fri, 18 Mar 2022 15:19:34 +0100
From:   Thomas Gleixner <tglx@...utronix.de>
To:     Peter Zijlstra <peterz@...radead.org>,
        "Kirill A. Shutemov" <kirill.shutemov@...ux.intel.com>
Cc:     mingo@...hat.com, bp@...en8.de, dave.hansen@...el.com,
        luto@...nel.org, sathyanarayanan.kuppuswamy@...ux.intel.com,
        aarcange@...hat.com, ak@...ux.intel.com, dan.j.williams@...el.com,
        david@...hat.com, hpa@...or.com, jgross@...e.com,
        jmattson@...gle.com, joro@...tes.org, jpoimboe@...hat.com,
        knsathya@...nel.org, pbonzini@...hat.com, sdeep@...are.com,
        seanjc@...gle.com, tony.luck@...el.com, vkuznets@...hat.com,
        wanpengli@...cent.com, thomas.lendacky@....com,
        brijesh.singh@....com, x86@...nel.org,
        linux-kernel@...r.kernel.org,
        Sean Christopherson <sean.j.christopherson@...el.com>,
        Dave Hansen <dave.hansen@...ux.intel.com>
Subject: Re: [PATCHv6 07/30] x86/traps: Add #VE support for TDX guest

On Thu, Mar 17 2022 at 21:21, Peter Zijlstra wrote:
> On Thu, Mar 17, 2022 at 08:33:54PM +0300, Kirill A. Shutemov wrote:
>>  - in NMI entry code (asm_exc_nmi()) before NMI nesting is safe:
>>    + for NMI from user mode, before switched to thread stack
>>    + for NMI from kernel, up to end_repead_nmi
>> 
>> After that points #VE is safe.
>
> In what way is it guaranteed that #VE isn't raised in those places? What
> does an auditor / future coder looking to changes things, need to
> consider to keep this so.
>
> From vague memories #VE can be raised on any memop, loading the stack
> address in the syscall-gap is a memop. What makes that special? Can we
> get a comment _there_ to explain how this is safe such that we can keep
> it so?
>
> Same for the NMI path I suppose.

#VE is raised by HLT, CPUID, I/O-Port access, MSR read/write, EPT violations

So in the hairy places:

 - HLT:       No business
 - I/O Ports: That would be outright stupid to use

 - CPUID:     Should never be used - Emphasis on should :)
 - MSRs:      Same as CPUID

 - EPT:       Well....

Thanks,

        Thomas

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