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Message-ID: <82efacaf-9dcb-f07a-dc2b-06668b1a745b@codethink.co.uk>
Date: Fri, 18 Mar 2022 15:25:10 +0000
From: Ben Dooks <ben.dooks@...ethink.co.uk>
To: linux-pci@...r.kernel.org
Cc: linux-kernel@...r.kernel.org, linux-riscv@...ts.infradead.org,
Bjorn Helgaas <bhelgaas@...gle.com>,
Palmer Dabbelt <palmer@...belt.com>,
Rob Herring <robh@...nel.org>,
Lorenzo Pieralisi <lorenzo.pieralisi@....com>,
Greentime Hu <greentime.hu@...ive.com>,
Paul Walmsley <paul.walmsley@...ive.com>
Subject: Re: [PATCH] PCI: fu740: Drop to 2.5GT/s to fix initial device probing
on some boards
On 18/03/2022 15:21, Ben Dooks wrote:
> The fu740 PCIe core does not probe any devices on the SiFive Unmatched
> board without this fix (or having U-Boot explicitly start the PCIe via
> either boot-script or user command). The fix is to start the link at
> 2.5GT/s speeds and once the link is up then change the maximum speed back
> to the default.
>
> The U-Boot driver claims to set the link-speed to 2.5GT/s to get the probe
> to work (and U-Boot does print link up at 2.5GT/s) in the following code:
> https://source.denx.de/u-boot/u-boot/-/blob/master/drivers/pci/pcie_dw_sifive.c?id=v2022.01#L271
>
> Signed-off-by: Ben Dooks <ben.dooks@...ethink.co.uk>
> --
> Note, this patch has had significant re-work since the previous 4
> sets, including trying to fix style, message, reliance on the U-Boot
> fix and the comments about usage of LINK_CAP and reserved fields.
Apologies, it seems I forgot to do "git commit --amend" on the last
file save. I've now sent a "V3"
--
Ben Dooks http://www.codethink.co.uk/
Senior Engineer Codethink - Providing Genius
https://www.codethink.co.uk/privacy.html
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