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Message-ID: <7575fca0-28dd-427c-022f-6087fbd7a34b@somainline.org>
Date: Sat, 19 Mar 2022 19:19:44 +0100
From: Konrad Dybcio <konrad.dybcio@...ainline.org>
To: ~postmarketos/upstreaming@...ts.sr.ht
Cc: martin.botka@...ainline.org,
angelogioacchino.delregno@...ainline.org,
marijn.suijten@...ainline.org, jamipkettunen@...ainline.org,
Andy Gross <agross@...nel.org>,
Bjorn Andersson <bjorn.andersson@...aro.org>,
Rob Herring <robh+dt@...nel.org>,
linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH 09/15] arm64: dts: qcom: msm8992-libra: Fix up the
framebuffer
On 19.03.2022 18:46, Konrad Dybcio wrote:
> Make sure the necessary clocks are kept on after clk_cleanup (until MDSS
> is properly handled by its own driver) and touch up the fb address to
> prevent some weird shifting. It's still not perfect, but at least the
> kernel log doesn't start a third deep into your screen..
>
> Signed-off-by: Konrad Dybcio <konrad.dybcio@...ainline.org>
> ---
> .../arm64/boot/dts/qcom/msm8992-xiaomi-libra.dts | 16 ++++++++++++++--
> 1 file changed, 14 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/msm8992-xiaomi-libra.dts b/arch/arm64/boot/dts/qcom/msm8992-xiaomi-libra.dts
> index e638fc489539..4e06641eb384 100644
> --- a/arch/arm64/boot/dts/qcom/msm8992-xiaomi-libra.dts
> +++ b/arch/arm64/boot/dts/qcom/msm8992-xiaomi-libra.dts
> @@ -29,13 +29,25 @@ chosen {
> #size-cells = <2>;
> ranges;
>
> - framebuffer0: framebuffer@...4000 {
> + framebuffer0: framebuffer@...3f48 {
Actually it turns out that 0x3400000 should be the address here and 2 lines below,
instead of 0x3403f48 (thanks Stephan & lk2nd!)..
If you don't mind this janky way of sending a fixup patch (resending a series of 15 seems a bit over the top), here's the fixed version:
>From e01cb8b11d42e5885998faca3964b029563174e8 Mon Sep 17 00:00:00 2001
From: Konrad Dybcio <konrad.dybcio@...ainline.org>
Date: Sat, 19 Mar 2022 17:32:25 +0100
Subject: [PATCH] arm64: dts: qcom: msm8992-libra: Fix up the framebuffer
Make sure the necessary clocks are kept on after clk_cleanup (until MDSS
is properly handled by its own driver) and touch up the fb address to
prevent some weird shifting.
Signed-off-by: Konrad Dybcio <konrad.dybcio@...ainline.org>
---
.../arm64/boot/dts/qcom/msm8992-xiaomi-libra.dts | 16 ++++++++++++++--
1 file changed, 14 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/msm8992-xiaomi-libra.dts b/arch/arm64/boot/dts/qcom/msm8992-xiaomi-libra.dts
index e638fc489539..7748b745a5df 100644
--- a/arch/arm64/boot/dts/qcom/msm8992-xiaomi-libra.dts
+++ b/arch/arm64/boot/dts/qcom/msm8992-xiaomi-libra.dts
@@ -29,13 +29,25 @@ chosen {
#size-cells = <2>;
ranges;
- framebuffer0: framebuffer@...4000 {
+ framebuffer0: framebuffer@...0000 {
compatible = "simple-framebuffer";
- reg = <0 0x3404000 0 (1080 * 1920 * 3)>;
+ reg = <0 0x3400000 0 (1080 * 1920 * 3)>;
width = <1080>;
height = <1920>;
stride = <(1080 * 3)>;
format = "r8g8b8";
+ /*
+ * That's a lot of clocks, but it's necessary due
+ * to unused clk cleanup & no panel driver yet..
+ */
+ clocks = <&mmcc MDSS_AHB_CLK>,
+ <&mmcc MDSS_AXI_CLK>,
+ <&mmcc MDSS_VSYNC_CLK>,
+ <&mmcc MDSS_MDP_CLK>,
+ <&mmcc MDSS_BYTE0_CLK>,
+ <&mmcc MDSS_PCLK0_CLK>,
+ <&mmcc MDSS_ESC0_CLK>;
+ power-domains = <&mmcc MDSS_GDSC>;
};
};
--
2.35.1
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