linux-kernel - Re: [PATCH 4/5 v2] dt-bindings: gnss: Add two more chips

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Message-ID: <YjjLGgjlw7zAJt9K@robh.at.kernel.org>
Date:   Mon, 21 Mar 2022 13:59:38 -0500
From:   Rob Herring <robh@...nel.org>
To:     Linus Walleij <linus.walleij@...aro.org>
Cc:     Johan Hovold <johan@...nel.org>, linux-kernel@...r.kernel.org,
        devicetree@...r.kernel.org, Krzysztof Kozlowski <krzk@...nel.org>
Subject: Re: [PATCH 4/5 v2] dt-bindings: gnss: Add two more chips

On Thu, Mar 17, 2022 at 11:58:43PM +0100, Linus Walleij wrote:
> The CSR GSD4t is a CSR product using the SiRFstarIV core, and
> the CSR CSRG05TA03-ICJE-R is a CSR product using the SiRFstarV
> core.
> 
> These chips have a SRESETN line that can be pulled low to hard
> reset the chip and in some designs this is connected to a GPIO,
> so add this as an optional property.
> 
> Update the example with a reset line so users see that it need
> to be tagged as active low.
> 
> Cc: devicetree@...r.kernel.org
> Cc: Krzysztof Kozlowski <krzk@...nel.org>
> Signed-off-by: Linus Walleij <linus.walleij@...aro.org>
> ---
> ChangeLog v1->v2:
> - Add maxItems: 1 to the reset-gpios
> ---
>  Documentation/devicetree/bindings/gnss/sirfstar.yaml | 8 ++++++++
>  1 file changed, 8 insertions(+)

Applied, thanks.