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Message-Id: <20220321231548.14276-16-ansuelsmth@gmail.com>
Date: Tue, 22 Mar 2022 00:15:45 +0100
From: Ansuel Smith <ansuelsmth@...il.com>
To: Rob Herring <robh+dt@...nel.org>,
Bjorn Andersson <bjorn.andersson@...aro.org>,
Andy Gross <agross@...nel.org>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>,
Ansuel Smith <ansuelsmth@...il.com>,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-msm@...r.kernel.org, linux-clk@...r.kernel.org
Cc: Krzysztof Kozlowski <krzk@...nel.org>
Subject: [PATCH v6 15/18] dt-bindings: clock: Add L2 clocks to qcom,krait-cc Documentation
Krait-cc qcom driver provide also L2 clocks and require the acpu_l2_aux
and the hfpll_l2 clock to be provided. Add these missing clocks to the
Documentation. The driver keep support for both old (it did already used
these clocks and we keep the same naming scheme) and this new
implementation and should prevent any regression by this fixup.
Signed-off-by: Ansuel Smith <ansuelsmth@...il.com>
Reviewed-by: Krzysztof Kozlowski <krzk@...nel.org>
---
.../devicetree/bindings/clock/qcom,krait-cc.yaml | 10 ++++++++--
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/clock/qcom,krait-cc.yaml b/Documentation/devicetree/bindings/clock/qcom,krait-cc.yaml
index e879bfbe67ac..de4320a85764 100644
--- a/Documentation/devicetree/bindings/clock/qcom,krait-cc.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,krait-cc.yaml
@@ -26,6 +26,8 @@ properties:
- description: phandle to CPU0 aux clock
- description: phandle to CPU1 aux clock
- description: phandle to QSB fixed clk
+ - description: phandle to hfpll for L2 mux
+ - description: phandle to L2 aux clock
clock-names:
items:
@@ -34,6 +36,8 @@ properties:
- const: acpu0_aux
- const: acpu1_aux
- const: qsb
+ - const: hfpll_l2
+ - const: acpu_l2_aux
'#clock-cells':
const: 1
@@ -51,9 +55,11 @@ examples:
clock-controller {
compatible = "qcom,krait-cc-v1";
clocks = <&hfpll0>, <&hfpll1>,
- <&acpu0_aux>, <&acpu1_aux>, <&qsb>;
+ <&acpu0_aux>, <&acpu1_aux>, <&qsb>,
+ <&hfpll_l2>, <&acpu_l2_aux>;
clock-names = "hfpll0", "hfpll1",
- "acpu0_aux", "acpu1_aux", "qsb";
+ "acpu0_aux", "acpu1_aux", "qsb",
+ "hfpll_l2", "acpu_l2_aux";
#clock-cells = <1>;
};
...
--
2.34.1
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