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Message-ID: <CAJF2gTSqbS3cUNcxKGoMT2zE3ws+gH6a0EssVEutpypR5YoHCA@mail.gmail.com>
Date:   Mon, 21 Mar 2022 08:22:08 +0800
From:   Guo Ren <guoren@...nel.org>
To:     Palmer Dabbelt <palmer@...belt.com>, Arnd Bergmann <arnd@...db.de>,
        Christoph Hellwig <hch@....de>
Cc:     linux-arch <linux-arch@...r.kernel.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        linux-riscv <linux-riscv@...ts.infradead.org>,
        linux-csky@...r.kernel.org,
        linux-s390 <linux-s390@...r.kernel.org>,
        sparclinux <sparclinux@...r.kernel.org>,
        linuxppc-dev <linuxppc-dev@...ts.ozlabs.org>,
        Parisc List <linux-parisc@...r.kernel.org>,
        "open list:BROADCOM NVRAM DRIVER" <linux-mips@...r.kernel.org>,
        Linux ARM <linux-arm-kernel@...ts.infradead.org>,
        "the arch/x86 maintainers" <x86@...nel.org>,
        Heiko Stübner <heiko@...ech.de>,
        Guo Ren <guoren@...ux.alibaba.com>, Guo Ren <guoren@...nel.org>
Subject: Re: [PATCH V8 10/20] riscv: compat: Re-implement TASK_SIZE for COMPAT_32BIT

For this patch, we need to add below to fixup the rv32 call rv64 elf
segment fault.

diff --git a/arch/riscv/include/asm/processor.h
b/arch/riscv/include/asm/processor.h
index 0749924d9e55..21c8072dce17 100644
--- a/arch/riscv/include/asm/processor.h
+++ b/arch/riscv/include/asm/processor.h
@@ -19,7 +19,11 @@
 #define TASK_UNMAPPED_BASE     PAGE_ALIGN(TASK_SIZE / 3)

 #define STACK_TOP              TASK_SIZE
-#define STACK_TOP_MAX          STACK_TOP
+#ifdef CONFIG_64BIT
+#define STACK_TOP_MAX          TASK_SIZE_64
+#else
+#define STACK_TOP_MAX          TASK_SIZE
+#endif
 #define STACK_ALIGN            16

 #ifndef __ASSEMBLY__

On Wed, Mar 16, 2022 at 3:04 PM <guoren@...nel.org> wrote:
>
> From: Guo Ren <guoren@...ux.alibaba.com>
>
> Make TASK_SIZE from const to dynamic detect TIF_32BIT flag
> function. Refer to arm64 to implement DEFAULT_MAP_WINDOW_64 for
> efi-stub.
>
> Limit 32-bit compatible process in 0-2GB virtual address range
> (which is enough for real scenarios), because it could avoid
> address sign extend problem when 32-bit enter 64-bit and ease
> software design.
>
> The standard 32-bit TASK_SIZE is 0x9dc00000:FIXADDR_START, and
> compared to a compatible 32-bit, it increases 476MB for the
> application's virtual address.
>
> Signed-off-by: Guo Ren <guoren@...ux.alibaba.com>
> Signed-off-by: Guo Ren <guoren@...nel.org>
> Reviewed-by: Arnd Bergmann <arnd@...db.de>
> Tested-by: Heiko Stuebner <heiko@...ech.de>
> ---
>  arch/riscv/include/asm/pgtable.h | 13 +++++++++++--
>  1 file changed, 11 insertions(+), 2 deletions(-)
>
> diff --git a/arch/riscv/include/asm/pgtable.h b/arch/riscv/include/asm/pgtable.h
> index e3549e50de95..afdc9ece2ba4 100644
> --- a/arch/riscv/include/asm/pgtable.h
> +++ b/arch/riscv/include/asm/pgtable.h
> @@ -705,8 +705,17 @@ static inline pmd_t pmdp_establish(struct vm_area_struct *vma,
>   * 63–48 all equal to bit 47, or else a page-fault exception will occur."
>   */
>  #ifdef CONFIG_64BIT
> -#define TASK_SIZE      (PGDIR_SIZE * PTRS_PER_PGD / 2)
> -#define TASK_SIZE_MIN  (PGDIR_SIZE_L3 * PTRS_PER_PGD / 2)
> +#define TASK_SIZE_64   (PGDIR_SIZE * PTRS_PER_PGD / 2)
> +#define TASK_SIZE_MIN  (PGDIR_SIZE_L3 * PTRS_PER_PGD / 2)
> +
> +#ifdef CONFIG_COMPAT
> +#define TASK_SIZE_32   (_AC(0x80000000, UL) - PAGE_SIZE)
> +#define TASK_SIZE      (test_thread_flag(TIF_32BIT) ? \
> +                        TASK_SIZE_32 : TASK_SIZE_64)
> +#else
> +#define TASK_SIZE      TASK_SIZE_64
> +#endif
> +
>  #else
>  #define TASK_SIZE      FIXADDR_START
>  #define TASK_SIZE_MIN  TASK_SIZE
> --
> 2.25.1
>


--
Best Regards
 Guo Ren

ML: https://lore.kernel.org/linux-csky/

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