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Message-ID: <CA+V-a8sQeet5-3Jmq9q8xdP0nOnQNSU8OMbwnsD_SQKJzMfuCw@mail.gmail.com>
Date: Tue, 22 Mar 2022 00:13:22 +0000
From: "Lad, Prabhakar" <prabhakar.csengg@...il.com>
To: Jacopo Mondi <jacopo@...ndi.org>
Cc: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>,
Niklas Söderlund <niklas.soderlund@...natech.se>,
Philipp Zabel <p.zabel@...gutronix.de>,
Mauro Carvalho Chehab <mchehab@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Laurent Pinchart <laurent.pinchart@...asonboard.com>,
Sakari Ailus <sakari.ailus@...ux.intel.com>,
Hans Verkuil <hverkuil-cisco@...all.nl>,
Geert Uytterhoeven <geert+renesas@...der.be>,
linux-media <linux-media@...r.kernel.org>,
Linux-Renesas <linux-renesas-soc@...r.kernel.org>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@...r.kernel.org>, LKML <linux-kernel@...r.kernel.org>,
Biju Das <biju.das.jz@...renesas.com>
Subject: Re: [RFC PATCH v2 2/4] media: dt-bindings: media: Document RZ/G2L CRU
Hi Jacopo,
Thank you for the review.
On Tue, Feb 15, 2022 at 1:05 PM Jacopo Mondi <jacopo@...ndi.org> wrote:
>
> Hi Prabhakar,
>
> On Fri, Jan 21, 2022 at 01:05:41AM +0000, Lad Prabhakar wrote:
> > Document the CRU block found on Renesas RZ/G2L SoC's.
> >
> > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
> > ---
> > v1->v2
> > * Dropped CSI
> > ---
> > .../bindings/media/renesas,rzg2l-cru.yaml | 152 ++++++++++++++++++
> > 1 file changed, 152 insertions(+)
> > create mode 100644 Documentation/devicetree/bindings/media/renesas,rzg2l-cru.yaml
> >
> > diff --git a/Documentation/devicetree/bindings/media/renesas,rzg2l-cru.yaml b/Documentation/devicetree/bindings/media/renesas,rzg2l-cru.yaml
> > new file mode 100644
> > index 000000000000..a03fc6ef0117
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/media/renesas,rzg2l-cru.yaml
> > @@ -0,0 +1,152 @@
> > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> > +# Copyright (C) 2022 Renesas Electronics Corp.
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/media/renesas,rzg2l-cru.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Renesas RZ/G2L Camera Data Receiving Unit (CRU)
> > +
> > +maintainers:
> > + - Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
> > +
> > +description:
> > + The RZ/G2L Camera Data Receiving Unit (CRU) device provides video input
> > + capabilities for the Renesas RZ/G2L family of devices.
> > +
> > + Depending on the instance the Image Processing input is connected to
> > + external SoC pins or to a CSI-2 receiver.
> > +
> > +properties:
> > + compatible:
> > + oneOf:
> > + - items:
> > + - enum:
> > + - renesas,r9a07g044-cru # RZ/G2{L,LC}
> > + - const: renesas,rzg2l-cru
> > +
> > + reg:
> > + maxItems: 1
> > +
> > + interrupts:
> > + maxItems: 3
> > +
> > + interrupt-names:
> > + items:
> > + - const: image_conv
> > + - const: image_conv_err
> > + - const: axi_mst_err
> > +
> > + clocks:
> > + items:
> > + - description: CRU Main clock
> > + - description: CPU Register access clock
> > + - description: CRU image transfer clock
> > +
> > + clock-names:
> > + items:
> > + - const: vclk
> > + - const: pclk
> > + - const: aclk
> > +
> > + power-domains:
> > + maxItems: 1
> > +
> > + resets:
> > + items:
> > + - description: CRU_PRESETN reset terminal
> > + - description: CRU_ARESETN reset terminal
> > +
> > + reset-names:
> > + items:
> > + - const: presetn
> > + - const: aresetn
> > +
> > + ports:
> > + $ref: /schemas/graph.yaml#/properties/ports
> > +
> > + properties:
> > + port@0:
> > + $ref: /schemas/graph.yaml#/$defs/port-base
> > + unevaluatedProperties: false
> > + description:
> > + Input port node, single endpoint describing a parallel input source.
> > +
> > + properties:
> > + endpoint:
> > + $ref: video-interfaces.yaml#
> > + unevaluatedProperties: false
> > +
> > + properties:
> > + hsync-active: true
> > + vsync-active: true
> > + bus-width: true
> > + data-shift: true
> > +
> > + port@1:
> > + $ref: /schemas/graph.yaml#/properties/port
> > + description:
> > + Output port node, describing the RZ/G2L Image Processing module
> > + connected the CSI-2 receiver
>
> Isn't this the port dedicated to the CSI-2 receiver input ?
>
Agreed.
> > +
> > + properties:
> > + endpoint@0:
> > + $ref: /schemas/graph.yaml#/properties/endpoint
> > + description: Endpoint connected to CSI2.
>
> And the andpoint should describe the connection between the CRU and
> the CSI-2 receiver ? (ie it should not contain CSI-2 specific
> properties, as those are specified by the CSI-2 receiver device node?)
>
Ok will drop the properties.
Cheers,
Prabhakar
> Thanks
> j
> > +
> > + anyOf:
> > + - required:
> > + - endpoint@0
> > +
> > +required:
> > + - compatible
> > + - reg
> > + - interrupts
> > + - interrupt-names
> > + - clocks
> > + - clock-names
> > + - resets
> > + - reset-names
> > + - power-domains
> > +
> > +additionalProperties: false
> > +
> > +examples:
> > + # Device node example with CSI-2
> > + - |
> > + #include <dt-bindings/clock/r9a07g044-cpg.h>
> > + #include <dt-bindings/interrupt-controller/arm-gic.h>
> > +
> > + cru: video@...30000 {
> > + compatible = "renesas,r9a07g044-cru", "renesas,rzg2l-cru";
> > + reg = <0x10830000 0x400>;
> > + interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>,
> > + <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
> > + <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
> > + interrupt-names = "image_conv", "image_conv_err", "axi_mst_err";
> > + clocks = <&cpg CPG_MOD R9A07G044_CRU_VCLK>,
> > + <&cpg CPG_MOD R9A07G044_CRU_PCLK>,
> > + <&cpg CPG_MOD R9A07G044_CRU_ACLK>;
> > + clock-names = "vclk", "pclk", "aclk";
> > + power-domains = <&cpg>;
> > + resets = <&cpg R9A07G044_CRU_PRESETN>,
> > + <&cpg R9A07G044_CRU_ARESETN>;
> > + reset-names = "presetn", "aresetn";
> > +
> > + ports {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > +
> > + port@1 {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > +
> > + reg = <1>;
> > +
> > + crucsi2: endpoint@0 {
> > + reg = <0>;
> > + remote-endpoint= <&csi2cru>;
> > + };
> > + };
> > + };
> > + };
> > --
> > 2.17.1
> >
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