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Message-ID: <CA+CK2bAPiMbdv441+B+_4aGyPeAgyyaZ=n5ni3WgfyDP3bEADA@mail.gmail.com>
Date: Wed, 23 Mar 2022 13:34:14 -0400
From: Pasha Tatashin <pasha.tatashin@...een.com>
To: Tong Tiangen <tongtiangen@...wei.com>
Cc: Thomas Gleixner <tglx@...utronix.de>,
Ingo Molnar <mingo@...hat.com>, Borislav Petkov <bp@...en8.de>,
Dave Hansen <dave.hansen@...ux.intel.com>,
"maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT)" <x86@...nel.org>,
"H. Peter Anvin" <hpa@...or.com>,
Andrew Morton <akpm@...ux-foundation.org>,
Catalin Marinas <catalin.marinas@....com>,
Will Deacon <will@...nel.org>,
Paul Walmsley <paul.walmsley@...ive.com>,
Palmer Dabbelt <palmer@...belt.com>,
Albert Ou <aou@...s.berkeley.edu>,
LKML <linux-kernel@...r.kernel.org>,
linux-mm <linux-mm@...ck.org>,
Linux ARM <linux-arm-kernel@...ts.infradead.org>,
linux-riscv@...ts.infradead.org
Subject: Re: [PATCH -next v2 1/4] mm: page_table_check: move
pxx_user_accessible_page into x86
On Tue, Mar 22, 2022 at 10:25 AM Tong Tiangen <tongtiangen@...wei.com> wrote:
>
> From: Kefeng Wang <wangkefeng.wang@...wei.com>
>
> The pxx_user_accessible_page() check the PTE bit, it's
> architecture-specific code, move them into x86's pgtable.h,
> also add default PMD/PUD_PAGE_SIZE definition, it's prepare
> for support page table check feature on new architecture.
>
> Signed-off-by: Kefeng Wang <wangkefeng.wang@...wei.com>
Acked-by: Pasha Tatashin <pasha.tatashin@...een.com>
Thank you for this work!
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