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Message-Id: <20220323183419.2278676-6-michael@walle.cc>
Date: Wed, 23 Mar 2022 19:34:19 +0100
From: Michael Walle <michael@...le.cc>
To: Andrew Lunn <andrew@...n.ch>,
Heiner Kallweit <hkallweit1@...il.com>,
Russell King <linux@...linux.org.uk>,
Jakub Kicinski <kuba@...nel.org>,
Paolo Abeni <pabeni@...hat.com>
Cc: "David S . Miller" <davem@...emloft.net>,
Xu Liang <lxu@...linear.com>,
Alexandre Belloni <alexandre.belloni@...tlin.com>,
Florian Fainelli <f.fainelli@...il.com>,
netdev@...r.kernel.org, linux-kernel@...r.kernel.org,
Michael Walle <michael@...le.cc>
Subject: [PATCH RFC net-next 5/5] net: phylink: handle the new is_c45_over_c22 property
Phylink treats C45 PHYs in a special way and assumes they can switch
their SerDes lanes between modes. This check is done by looking at the
is_c45 property. But there are PHYs, namely the GPY215, which are C45
PHYs but behind a C22 bus. Thus while the PHY is a C45 one, the is_c45
property is not set because it uses indirect MMD access via the C22
registers. Therefore, add the is_c45_over_c22 property to the check,
which indicates this sort of PHY handling.
Signed-off-by: Michael Walle <michael@...le.cc>
---
drivers/net/phy/phylink.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/phy/phylink.c b/drivers/net/phy/phylink.c
index 06943889d747..633cccfbd5f4 100644
--- a/drivers/net/phy/phylink.c
+++ b/drivers/net/phy/phylink.c
@@ -1369,7 +1369,7 @@ static int phylink_bringup_phy(struct phylink *pl, struct phy_device *phy,
* speeds. We really need to know which interface modes the PHY and
* MAC supports to properly work out which linkmodes can be supported.
*/
- if (phy->is_c45 &&
+ if ((phy->is_c45 || phy->is_c45_over_c22) &&
interface != PHY_INTERFACE_MODE_RXAUI &&
interface != PHY_INTERFACE_MODE_XAUI &&
interface != PHY_INTERFACE_MODE_USXGMII)
--
2.30.2
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