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Date: Thu, 24 Mar 2022 07:27:33 +0000 From: Howard Chiu <howard_chiu@...eedtech.com> To: "robh+dt@...nel.org" <robh+dt@...nel.org>, Joel Stanley <joel@....id.au>, "andrew@...id.au" <andrew@...id.au>, "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>, "linux-arm-kernel@...ts.infradead.org" <linux-arm-kernel@...ts.infradead.org>, "linux-aspeed@...ts.ozlabs.org" <linux-aspeed@...ts.ozlabs.org>, "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org> CC: Troy Lee <troy_lee@...eedtech.com> Subject: [PATCH v1 2/3] dt-bindings: clock: Add AST2600 video engine reset definition Reset bit for VE is 6 Signed-off-by: Howard Chiu <howard_chiu@...eedtech.com> --- include/dt-bindings/clock/ast2600-clock.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/dt-bindings/clock/ast2600-clock.h b/include/dt-bindings/clock/ast2600-clock.h index 62b9520a00fd..a7d0ad9539eb 100644 --- a/include/dt-bindings/clock/ast2600-clock.h +++ b/include/dt-bindings/clock/ast2600-clock.h @@ -110,6 +110,7 @@ #define ASPEED_RESET_PCIE_DEV_OEN 20 #define ASPEED_RESET_PCIE_RC_O 19 #define ASPEED_RESET_PCIE_RC_OEN 18 +#define ASPEED_RESET_VIDEO 6 #define ASPEED_RESET_PCI_DP 5 #define ASPEED_RESET_AHB 1 #define ASPEED_RESET_SDRAM 0 -- 2.25.1
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