linux-kernel - [PATCH] serial: tegra: Correct error handling sequence

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Date:   Thu, 24 Mar 2022 14:34:04 +0530
From:   Kartik <kkartik@...dia.com>
To:     <kkartik@...dia.com>, <ldewangan@...dia.com>,
        <gregkh@...uxfoundation.org>, <jirislaby@...nel.org>,
        <thierry.reding@...il.com>, <jonathanh@...dia.com>,
        <linux-kernel@...r.kernel.org>, <linux-serial@...r.kernel.org>,
        <linux-tegra@...r.kernel.org>
Subject: [PATCH] serial: tegra: Correct error handling sequence

From: kartik <kkartik@...dia.com>

In the current error handling sequence the driver checks for break
error at the end.

By handling the break error first, we can avoid a situation where the
driver keeps processing the errors which can be caused by an unhandled
break error.

Signed-off-by: kartik <kkartik@...dia.com>
---
 drivers/tty/serial/serial-tegra.c | 26 +++++++++++++-------------
 1 file changed, 13 insertions(+), 13 deletions(-)

diff --git a/drivers/tty/serial/serial-tegra.c b/drivers/tty/serial/serial-tegra.c
index b6223fa..ba78a02 100644
--- a/drivers/tty/serial/serial-tegra.c
+++ b/drivers/tty/serial/serial-tegra.c
@@ -440,7 +440,19 @@ static char tegra_uart_decode_rx_error(struct tegra_uart_port *tup,
 	char flag = TTY_NORMAL;
 
 	if (unlikely(lsr & TEGRA_UART_LSR_ANY)) {
-		if (lsr & UART_LSR_OE) {
+		if (lsr & UART_LSR_BI) {
+			/*
+			 * Break error
+			 * If FIFO read error without any data, reset Rx FIFO
+			 */
+			if (!(lsr & UART_LSR_DR) && (lsr & UART_LSR_FIFOE))
+				tegra_uart_fifo_reset(tup, UART_FCR_CLEAR_RCVR);
+			if (tup->uport.ignore_status_mask & UART_LSR_BI)
+				return TTY_BREAK;
+			flag = TTY_BREAK;
+			tup->uport.icount.brk++;
+			dev_dbg(tup->uport.dev, "Got Break\n");
+		} else if (lsr & UART_LSR_OE) {
 			/* Overrrun error */
 			flag = TTY_OVERRUN;
 			tup->uport.icount.overrun++;
@@ -454,18 +466,6 @@ static char tegra_uart_decode_rx_error(struct tegra_uart_port *tup,
 			flag = TTY_FRAME;
 			tup->uport.icount.frame++;
 			dev_dbg(tup->uport.dev, "Got frame errors\n");
-		} else if (lsr & UART_LSR_BI) {
-			/*
-			 * Break error
-			 * If FIFO read error without any data, reset Rx FIFO
-			 */
-			if (!(lsr & UART_LSR_DR) && (lsr & UART_LSR_FIFOE))
-				tegra_uart_fifo_reset(tup, UART_FCR_CLEAR_RCVR);
-			if (tup->uport.ignore_status_mask & UART_LSR_BI)
-				return TTY_BREAK;
-			flag = TTY_BREAK;
-			tup->uport.icount.brk++;
-			dev_dbg(tup->uport.dev, "Got Break\n");
 		}
 		uart_insert_char(&tup->uport, lsr, UART_LSR_OE, 0, flag);
 	}
-- 
2.7.4