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Date: Thu, 24 Mar 2022 18:48:12 +0800
From: kernel test robot <lkp@...el.com>
To: Bart Van Assche <bvanassche@....org>
Cc: kbuild-all@...ts.01.org, linux-kernel@...r.kernel.org
Subject: [bvanassche:ufs-for-next 324/324]
drivers/scsi/ufs-drivers/ufs-qcom-ice.c:156:9: error: implicit declaration
of function 'udelay'
Hi Bart,
First bad commit (maybe != root cause):
tree: https://github.com/bvanassche/linux ufs-for-next
head: b93e987f91a0c037fc4357107f5144110cd84d08
commit: b93e987f91a0c037fc4357107f5144110cd84d08 [324/324] scsi: ufs: Split the drivers/scsi/ufs directory
config: arm-allmodconfig (https://download.01.org/0day-ci/archive/20220324/202203241820.7HZPRpGx-lkp@intel.com/config)
compiler: arm-linux-gnueabi-gcc (GCC) 11.2.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://github.com/bvanassche/linux/commit/b93e987f91a0c037fc4357107f5144110cd84d08
git remote add bvanassche https://github.com/bvanassche/linux
git fetch --no-tags bvanassche ufs-for-next
git checkout b93e987f91a0c037fc4357107f5144110cd84d08
# save the config file to linux build tree
mkdir build_dir
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.2.0 make.cross O=build_dir ARCH=arm SHELL=/bin/bash drivers/scsi/ufs-drivers/
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@...el.com>
All errors (new ones prefixed by >>):
drivers/scsi/ufs-drivers/ufs-qcom-ice.c: In function 'qcom_ice_optimization_enable':
>> drivers/scsi/ufs-drivers/ufs-qcom-ice.c:156:9: error: implicit declaration of function 'udelay' [-Werror=implicit-function-declaration]
156 | udelay(5);
| ^~~~~~
drivers/scsi/ufs-drivers/ufs-qcom-ice.c: In function 'ufs_qcom_ice_program_key':
>> drivers/scsi/ufs-drivers/ufs-qcom-ice.c:221:18: error: 'struct ufs_hba' has no member named 'crypto_cap_array'
221 | cap = hba->crypto_cap_array[cfg->crypto_cap_idx];
| ^~
cc1: some warnings being treated as errors
vim +/udelay +156 drivers/scsi/ufs-drivers/ufs-qcom-ice.c
df4ec2fa7a4dc2 drivers/scsi/ufs/ufs-qcom-ice.c Eric Biggers 2020-07-10 147
df4ec2fa7a4dc2 drivers/scsi/ufs/ufs-qcom-ice.c Eric Biggers 2020-07-10 148 static void qcom_ice_optimization_enable(struct ufs_qcom_host *host)
df4ec2fa7a4dc2 drivers/scsi/ufs/ufs-qcom-ice.c Eric Biggers 2020-07-10 149 {
df4ec2fa7a4dc2 drivers/scsi/ufs/ufs-qcom-ice.c Eric Biggers 2020-07-10 150 u32 regval;
df4ec2fa7a4dc2 drivers/scsi/ufs/ufs-qcom-ice.c Eric Biggers 2020-07-10 151
df4ec2fa7a4dc2 drivers/scsi/ufs/ufs-qcom-ice.c Eric Biggers 2020-07-10 152 /* ICE Optimizations Enable Sequence */
df4ec2fa7a4dc2 drivers/scsi/ufs/ufs-qcom-ice.c Eric Biggers 2020-07-10 153 regval = qcom_ice_readl(host, QCOM_ICE_REG_ADVANCED_CONTROL);
df4ec2fa7a4dc2 drivers/scsi/ufs/ufs-qcom-ice.c Eric Biggers 2020-07-10 154 regval |= 0xD807100;
df4ec2fa7a4dc2 drivers/scsi/ufs/ufs-qcom-ice.c Eric Biggers 2020-07-10 155 /* ICE HPG requires delay before writing */
df4ec2fa7a4dc2 drivers/scsi/ufs/ufs-qcom-ice.c Eric Biggers 2020-07-10 @156 udelay(5);
df4ec2fa7a4dc2 drivers/scsi/ufs/ufs-qcom-ice.c Eric Biggers 2020-07-10 157 qcom_ice_writel(host, regval, QCOM_ICE_REG_ADVANCED_CONTROL);
df4ec2fa7a4dc2 drivers/scsi/ufs/ufs-qcom-ice.c Eric Biggers 2020-07-10 158 udelay(5);
df4ec2fa7a4dc2 drivers/scsi/ufs/ufs-qcom-ice.c Eric Biggers 2020-07-10 159 }
df4ec2fa7a4dc2 drivers/scsi/ufs/ufs-qcom-ice.c Eric Biggers 2020-07-10 160
df4ec2fa7a4dc2 drivers/scsi/ufs/ufs-qcom-ice.c Eric Biggers 2020-07-10 161 int ufs_qcom_ice_enable(struct ufs_qcom_host *host)
df4ec2fa7a4dc2 drivers/scsi/ufs/ufs-qcom-ice.c Eric Biggers 2020-07-10 162 {
df4ec2fa7a4dc2 drivers/scsi/ufs/ufs-qcom-ice.c Eric Biggers 2020-07-10 163 if (!(host->hba->caps & UFSHCD_CAP_CRYPTO))
df4ec2fa7a4dc2 drivers/scsi/ufs/ufs-qcom-ice.c Eric Biggers 2020-07-10 164 return 0;
df4ec2fa7a4dc2 drivers/scsi/ufs/ufs-qcom-ice.c Eric Biggers 2020-07-10 165 qcom_ice_low_power_mode_enable(host);
df4ec2fa7a4dc2 drivers/scsi/ufs/ufs-qcom-ice.c Eric Biggers 2020-07-10 166 qcom_ice_optimization_enable(host);
df4ec2fa7a4dc2 drivers/scsi/ufs/ufs-qcom-ice.c Eric Biggers 2020-07-10 167 return ufs_qcom_ice_resume(host);
df4ec2fa7a4dc2 drivers/scsi/ufs/ufs-qcom-ice.c Eric Biggers 2020-07-10 168 }
df4ec2fa7a4dc2 drivers/scsi/ufs/ufs-qcom-ice.c Eric Biggers 2020-07-10 169
df4ec2fa7a4dc2 drivers/scsi/ufs/ufs-qcom-ice.c Eric Biggers 2020-07-10 170 /* Poll until all BIST bits are reset */
df4ec2fa7a4dc2 drivers/scsi/ufs/ufs-qcom-ice.c Eric Biggers 2020-07-10 171 static int qcom_ice_wait_bist_status(struct ufs_qcom_host *host)
df4ec2fa7a4dc2 drivers/scsi/ufs/ufs-qcom-ice.c Eric Biggers 2020-07-10 172 {
df4ec2fa7a4dc2 drivers/scsi/ufs/ufs-qcom-ice.c Eric Biggers 2020-07-10 173 int count;
df4ec2fa7a4dc2 drivers/scsi/ufs/ufs-qcom-ice.c Eric Biggers 2020-07-10 174 u32 reg;
df4ec2fa7a4dc2 drivers/scsi/ufs/ufs-qcom-ice.c Eric Biggers 2020-07-10 175
df4ec2fa7a4dc2 drivers/scsi/ufs/ufs-qcom-ice.c Eric Biggers 2020-07-10 176 for (count = 0; count < 100; count++) {
df4ec2fa7a4dc2 drivers/scsi/ufs/ufs-qcom-ice.c Eric Biggers 2020-07-10 177 reg = qcom_ice_readl(host, QCOM_ICE_REG_BIST_STATUS);
df4ec2fa7a4dc2 drivers/scsi/ufs/ufs-qcom-ice.c Eric Biggers 2020-07-10 178 if (!(reg & QCOM_ICE_BIST_STATUS_MASK))
df4ec2fa7a4dc2 drivers/scsi/ufs/ufs-qcom-ice.c Eric Biggers 2020-07-10 179 break;
df4ec2fa7a4dc2 drivers/scsi/ufs/ufs-qcom-ice.c Eric Biggers 2020-07-10 180 udelay(50);
df4ec2fa7a4dc2 drivers/scsi/ufs/ufs-qcom-ice.c Eric Biggers 2020-07-10 181 }
df4ec2fa7a4dc2 drivers/scsi/ufs/ufs-qcom-ice.c Eric Biggers 2020-07-10 182 if (reg)
df4ec2fa7a4dc2 drivers/scsi/ufs/ufs-qcom-ice.c Eric Biggers 2020-07-10 183 return -ETIMEDOUT;
df4ec2fa7a4dc2 drivers/scsi/ufs/ufs-qcom-ice.c Eric Biggers 2020-07-10 184 return 0;
df4ec2fa7a4dc2 drivers/scsi/ufs/ufs-qcom-ice.c Eric Biggers 2020-07-10 185 }
df4ec2fa7a4dc2 drivers/scsi/ufs/ufs-qcom-ice.c Eric Biggers 2020-07-10 186
df4ec2fa7a4dc2 drivers/scsi/ufs/ufs-qcom-ice.c Eric Biggers 2020-07-10 187 int ufs_qcom_ice_resume(struct ufs_qcom_host *host)
df4ec2fa7a4dc2 drivers/scsi/ufs/ufs-qcom-ice.c Eric Biggers 2020-07-10 188 {
df4ec2fa7a4dc2 drivers/scsi/ufs/ufs-qcom-ice.c Eric Biggers 2020-07-10 189 int err;
df4ec2fa7a4dc2 drivers/scsi/ufs/ufs-qcom-ice.c Eric Biggers 2020-07-10 190
df4ec2fa7a4dc2 drivers/scsi/ufs/ufs-qcom-ice.c Eric Biggers 2020-07-10 191 if (!(host->hba->caps & UFSHCD_CAP_CRYPTO))
df4ec2fa7a4dc2 drivers/scsi/ufs/ufs-qcom-ice.c Eric Biggers 2020-07-10 192 return 0;
df4ec2fa7a4dc2 drivers/scsi/ufs/ufs-qcom-ice.c Eric Biggers 2020-07-10 193
df4ec2fa7a4dc2 drivers/scsi/ufs/ufs-qcom-ice.c Eric Biggers 2020-07-10 194 err = qcom_ice_wait_bist_status(host);
df4ec2fa7a4dc2 drivers/scsi/ufs/ufs-qcom-ice.c Eric Biggers 2020-07-10 195 if (err) {
df4ec2fa7a4dc2 drivers/scsi/ufs/ufs-qcom-ice.c Eric Biggers 2020-07-10 196 dev_err(host->hba->dev, "BIST status error (%d)\n", err);
df4ec2fa7a4dc2 drivers/scsi/ufs/ufs-qcom-ice.c Eric Biggers 2020-07-10 197 return err;
df4ec2fa7a4dc2 drivers/scsi/ufs/ufs-qcom-ice.c Eric Biggers 2020-07-10 198 }
df4ec2fa7a4dc2 drivers/scsi/ufs/ufs-qcom-ice.c Eric Biggers 2020-07-10 199 return 0;
df4ec2fa7a4dc2 drivers/scsi/ufs/ufs-qcom-ice.c Eric Biggers 2020-07-10 200 }
df4ec2fa7a4dc2 drivers/scsi/ufs/ufs-qcom-ice.c Eric Biggers 2020-07-10 201
df4ec2fa7a4dc2 drivers/scsi/ufs/ufs-qcom-ice.c Eric Biggers 2020-07-10 202 /*
df4ec2fa7a4dc2 drivers/scsi/ufs/ufs-qcom-ice.c Eric Biggers 2020-07-10 203 * Program a key into a QC ICE keyslot, or evict a keyslot. QC ICE requires
df4ec2fa7a4dc2 drivers/scsi/ufs/ufs-qcom-ice.c Eric Biggers 2020-07-10 204 * vendor-specific SCM calls for this; it doesn't support the standard way.
df4ec2fa7a4dc2 drivers/scsi/ufs/ufs-qcom-ice.c Eric Biggers 2020-07-10 205 */
df4ec2fa7a4dc2 drivers/scsi/ufs/ufs-qcom-ice.c Eric Biggers 2020-07-10 206 int ufs_qcom_ice_program_key(struct ufs_hba *hba,
df4ec2fa7a4dc2 drivers/scsi/ufs/ufs-qcom-ice.c Eric Biggers 2020-07-10 207 const union ufs_crypto_cfg_entry *cfg, int slot)
df4ec2fa7a4dc2 drivers/scsi/ufs/ufs-qcom-ice.c Eric Biggers 2020-07-10 208 {
df4ec2fa7a4dc2 drivers/scsi/ufs/ufs-qcom-ice.c Eric Biggers 2020-07-10 209 union ufs_crypto_cap_entry cap;
df4ec2fa7a4dc2 drivers/scsi/ufs/ufs-qcom-ice.c Eric Biggers 2020-07-10 210 union {
df4ec2fa7a4dc2 drivers/scsi/ufs/ufs-qcom-ice.c Eric Biggers 2020-07-10 211 u8 bytes[AES_256_XTS_KEY_SIZE];
df4ec2fa7a4dc2 drivers/scsi/ufs/ufs-qcom-ice.c Eric Biggers 2020-07-10 212 u32 words[AES_256_XTS_KEY_SIZE / sizeof(u32)];
df4ec2fa7a4dc2 drivers/scsi/ufs/ufs-qcom-ice.c Eric Biggers 2020-07-10 213 } key;
df4ec2fa7a4dc2 drivers/scsi/ufs/ufs-qcom-ice.c Eric Biggers 2020-07-10 214 int i;
df4ec2fa7a4dc2 drivers/scsi/ufs/ufs-qcom-ice.c Eric Biggers 2020-07-10 215 int err;
df4ec2fa7a4dc2 drivers/scsi/ufs/ufs-qcom-ice.c Eric Biggers 2020-07-10 216
df4ec2fa7a4dc2 drivers/scsi/ufs/ufs-qcom-ice.c Eric Biggers 2020-07-10 217 if (!(cfg->config_enable & UFS_CRYPTO_CONFIGURATION_ENABLE))
df4ec2fa7a4dc2 drivers/scsi/ufs/ufs-qcom-ice.c Eric Biggers 2020-07-10 218 return qcom_scm_ice_invalidate_key(slot);
df4ec2fa7a4dc2 drivers/scsi/ufs/ufs-qcom-ice.c Eric Biggers 2020-07-10 219
df4ec2fa7a4dc2 drivers/scsi/ufs/ufs-qcom-ice.c Eric Biggers 2020-07-10 220 /* Only AES-256-XTS has been tested so far. */
df4ec2fa7a4dc2 drivers/scsi/ufs/ufs-qcom-ice.c Eric Biggers 2020-07-10 @221 cap = hba->crypto_cap_array[cfg->crypto_cap_idx];
:::::: The code at line 156 was first introduced by commit
:::::: df4ec2fa7a4dc20bed62a407f77b5c57f1afbbc8 scsi: ufs-qcom: Add Inline Crypto Engine support
:::::: TO: Eric Biggers <ebiggers@...gle.com>
:::::: CC: Martin K. Petersen <martin.petersen@...cle.com>
--
0-DAY CI Kernel Test Service
https://01.org/lkp
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