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Message-ID: <20220324121905.GH2854@thinkpad>
Date: Thu, 24 Mar 2022 17:49:05 +0530
From: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
To: Serge Semin <Sergey.Semin@...kalelectronics.ru>
Cc: Jingoo Han <jingoohan1@...il.com>,
Gustavo Pimentel <gustavo.pimentel@...opsys.com>,
Bjorn Helgaas <bhelgaas@...gle.com>,
Lorenzo Pieralisi <lorenzo.pieralisi@....com>,
Rob Herring <robh@...nel.org>,
Krzysztof WilczyĆski <kw@...ux.com>,
Serge Semin <fancer.lancer@...il.com>,
Alexey Malahov <Alexey.Malahov@...kalelectronics.ru>,
Pavel Parkhomenko <Pavel.Parkhomenko@...kalelectronics.ru>,
Frank Li <Frank.Li@....com>, linux-pci@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH 08/12] PCI: dwc: Discard IP-core version checking on
unrolled iATU detection
On Thu, Mar 24, 2022 at 04:25:19AM +0300, Serge Semin wrote:
> It's pretty much pointless. Even though unrolled version of the internal
> ATU has been indeed available since DWC PCIe v4.80a IP-core, there is no
> guarantee it was enabled during the IP-core configuration (Synopsys
> suggests to contact the Solvnet support for guidance of how to do that for
> the newer IP-cores). So the only reliable way to find out the unrolled
> iATU feature availability is indeed to check the iATU viewport register
> content. In accordance with the reference manual [1] if the register
> doesn't exist (unrolled iATU is enabled) it's content is fixed with
> 0xff-s, otherwise it will contain some zeros. So we can freely drop the
> IP-core version checking in this matter then and use the
> dw_pcie_iatu_unroll_enabled() method only to detect whether iATU/eDMA
> space is unrolled.
>
> [1] DesignWare Cores, PCI Express Controller, Register Desciptions,
> v.4.90a, December 2016, p.855
>
> Signed-off-by: Serge Semin <Sergey.Semin@...kalelectronics.ru>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
Thanks,
Mani
> ---
> drivers/pci/controller/dwc/pcie-designware.c | 11 +++++------
> 1 file changed, 5 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/pci/controller/dwc/pcie-designware.c b/drivers/pci/controller/dwc/pcie-designware.c
> index 3bd1cfd12148..e3d2c11e6998 100644
> --- a/drivers/pci/controller/dwc/pcie-designware.c
> +++ b/drivers/pci/controller/dwc/pcie-designware.c
> @@ -600,15 +600,15 @@ static void dw_pcie_link_set_max_speed(struct dw_pcie *pci, u32 link_gen)
>
> }
>
> -static u8 dw_pcie_iatu_unroll_enabled(struct dw_pcie *pci)
> +static bool dw_pcie_iatu_unroll_enabled(struct dw_pcie *pci)
> {
> u32 val;
>
> val = dw_pcie_readl_dbi(pci, PCIE_ATU_VIEWPORT);
> if (val == 0xffffffff)
> - return 1;
> + return true;
>
> - return 0;
> + return false;
> }
>
> static void dw_pcie_iatu_detect_regions_unroll(struct dw_pcie *pci)
> @@ -680,9 +680,8 @@ void dw_pcie_iatu_detect(struct dw_pcie *pci)
> struct device *dev = pci->dev;
> struct platform_device *pdev = to_platform_device(dev);
>
> - if (pci->version >= 0x480A || (!pci->version &&
> - dw_pcie_iatu_unroll_enabled(pci))) {
> - pci->iatu_unroll_enabled = true;
> + pci->iatu_unroll_enabled = dw_pcie_iatu_unroll_enabled(pci);
> + if (pci->iatu_unroll_enabled) {
> if (!pci->atu_base) {
> struct resource *res =
> platform_get_resource_byname(pdev, IORESOURCE_MEM, "atu");
> --
> 2.35.1
>
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