[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-Id: <20220324155649.285924-10-marcel@ziswiler.com>
Date: Thu, 24 Mar 2022 16:56:48 +0100
From: Marcel Ziswiler <marcel@...wiler.com>
To: linux-arm-kernel@...ts.infradead.org
Cc: Marcel Ziswiler <marcel.ziswiler@...adex.com>,
Andrejs Cainikovs <andrejs.cainikovs@...adex.com>,
Arnd Bergmann <arnd@...db.de>,
Fabio Estevam <festevam@...il.com>,
Frank Rowand <frowand.list@...il.com>,
Krzysztof Kozlowski <krzysztof.kozlowski@...onical.com>,
NXP Linux Team <linux-imx@....com>,
Olof Johansson <olof@...om.net>,
Pengutronix Kernel Team <kernel@...gutronix.de>,
Rob Herring <robh+dt@...nel.org>,
Sascha Hauer <s.hauer@...gutronix.de>,
Shawn Guo <shawnguo@...nel.org>, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: [PATCH v1 09/10] arm64: dts: imx8mm-verdin: note about disabled sd1 pull-ups
From: Marcel Ziswiler <marcel.ziswiler@...adex.com>
Add a note about us using discrete external on-module resistors
pulling-up to the on-module +V3.3_1.8_SD (LDO5) rail and explicitly
disabling the internal pull-ups due to ERR050080 [1]:
IO: Degradation of internal IO pullup/pulldown current capability for
IO’s continuously driven in a 3.3V operating mode
[1] https://www.nxp.com/webapp/Download?colCode=IMX8MM_0N87W
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@...adex.com>
---
arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi
index 6e1c762fd2e7..97dd7a00d63b 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi
@@ -1179,6 +1179,10 @@ pinctrl_usdhc2_pwr_en: usdhc2pwrengrp {
<MX8MM_IOMUXC_NAND_CLE_GPIO3_IO5 0x6>; /* SODIMM 76 */
};
+ /*
+ * Note: Due to ERR050080 we use discrete external on-module resistors pulling-up to the
+ * on-module +V3.3_1.8_SD (LDO5) rail and explicitly disable the internal pull-ups here.
+ */
pinctrl_usdhc2: usdhc2grp {
fsl,pins =
<MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x10>,
--
2.34.1
Powered by blists - more mailing lists