linux-kernel - Re: [PATCH v4] pinctrl: ingenic: Fix regmap on X series SoCs

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Message-ID: <CACRpkdbEukaSdZDbA0JRuwCFjK5WLdMWB1Rs2VLe=WNSvfjBZA@mail.gmail.com>
Date:   Thu, 24 Mar 2022 20:07:00 +0100
From:   Linus Walleij <linus.walleij@...aro.org>
To:     Aidan MacDonald <aidanmacdonald.0x0@...il.com>
Cc:     paul@...pouillou.net, linux-mips@...r.kernel.org,
        linux-gpio@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v4] pinctrl: ingenic: Fix regmap on X series SoCs

On Thu, Mar 17, 2022 at 1:07 AM Aidan MacDonald
<aidanmacdonald.0x0@...il.com> wrote:

> The X series Ingenic SoCs have a shadow GPIO group which is at a higher
> offset than the other groups, and is used for all GPIO configuration.
> The regmap did not take this offset into account and set max_register
> too low, so the regmap API blocked writes to the shadow group, which
> made the pinctrl driver unable to configure any pins.
>
> Fix this by adding regmap access tables to the chip info. The way that
> max_register was computed was also off by one, since max_register is an
> inclusive bound, not an exclusive bound; this has been fixed.
>
> Signed-off-by: Aidan MacDonald <aidanmacdonald.0x0@...il.com>
> ---
> v1 -> v2: use regmap_access_table
> v2 -> v3: compute max_register instead of putting it in chip_info
> v3 -> v4: explain the fix to the max_register calculation

Patch applied!

Yours,
Linus Walleij