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Message-ID: <da463ecb-e4ac-6e9c-c3a6-775d5c853807@kernel.org>
Date: Fri, 25 Mar 2022 18:36:35 +0100
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Guillaume Ranquet <granquet@...libre.com>, chunkuang.hu@...nel.org,
p.zabel@...gutronix.de, airlied@...ux.ie, daniel@...ll.ch,
robh+dt@...nel.org, maarten.lankhorst@...ux.intel.com,
mripard@...nel.org, tzimmermann@...e.de, matthias.bgg@...il.com,
chunfeng.yun@...iatek.com, kishon@...com, vkoul@...nel.org,
deller@....de, ck.hu@...iatek.com, jitao.shi@...iatek.com,
angelogioacchino.delregno@...labora.com
Cc: dri-devel@...ts.freedesktop.org,
linux-mediatek@...ts.infradead.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-phy@...ts.infradead.org, linux-fbdev@...r.kernel.org,
markyacoub@...gle.com
Subject: Re: [PATCH 03/22] dt-bindings: mediatek,dp_phy: Add Display Port PHY
binding
On 25/03/2022 18:14, Guillaume Ranquet wrote:
> This phy controller is embedded in the Display Port Controller on mt8195 SoCs.
>
> Signed-off-by: Guillaume Ranquet <granquet@...libre.com>
> ---
> .../bindings/phy/mediatek,dp-phy.yaml | 43 +++++++++++++++++++
> 1 file changed, 43 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/phy/mediatek,dp-phy.yaml
>
> diff --git a/Documentation/devicetree/bindings/phy/mediatek,dp-phy.yaml b/Documentation/devicetree/bindings/phy/mediatek,dp-phy.yaml
> new file mode 100644
> index 000000000000..4180d40f4fa7
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/phy/mediatek,dp-phy.yaml
> @@ -0,0 +1,43 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +# Copyright (c) 2022 MediaTek
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/phy/mediatek,dp-phy.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: MediaTek Display Port PHY binding
Skip "binding"
> +
> +maintainers:
> + - CK Hu <ck.hu@...iatek.com>
> + - Jitao shi <jitao.shi@...iatek.com>
> +
> +description: |
> + Device tree bindings for the Mediatek (embedded) Display Port PHY
> + present on some Mediatek SoCs.
> +
> +properties:
> + compatible:
> + enum:
> + - mediatek,mt8195-dp-phy
> +
> + regmap:
> + $ref: /schemas/types.yaml#/definitions/phandle
> + description: Phandle to the Display Port node.
Need a vendor prefix and descriptive suffix (e.g. mediatek,dp-syscon).
> +
> + "#phy-cells":
> + const: 0
> +
> +required:
> + - compatible
> + - regmap
> + - "#phy-cells"
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + dp_phy: dp_phy {
Generic node name: just phy. Also underscores shoulk not be in node name.
> + compatible = "mediatek,mt8195-dp-phy";
> + regmap = <&dp_tx>;
> + #phy-cells = <0>;
> + };
Best regards,
Krzysztof
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