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Message-ID: <be06e57d-302e-e641-a134-c45ea89a6a6b@collabora.com>
Date: Fri, 25 Mar 2022 15:15:24 +0100
From: AngeloGioacchino Del Regno
<angelogioacchino.delregno@...labora.com>
To: Jianjun Wang <jianjun.wang@...iatek.com>,
Chunfeng Yun <chunfeng.yun@...iatek.com>,
Kishon Vijay Abraham I <kishon@...com>,
Vinod Koul <vkoul@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Matthias Brugger <matthias.bgg@...il.com>,
Chen-Yu Tsai <wenst@...omium.org>,
Krzysztof Kozlowski <krzk@...nel.org>
Cc: Wei-Shun Chang <weishunc@...gle.com>,
linux-arm-kernel@...ts.infradead.org,
linux-mediatek@...ts.infradead.org, linux-phy@...ts.infradead.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
rex-bc.chen@...iatek.com, randy.wu@...iatek.com,
jieyy.yang@...iatek.com, chuanjia.liu@...iatek.com,
qizhong.cheng@...iatek.com, jian.yang@...iatek.com
Subject: Re: [PATCH v4 2/2] phy: mediatek: Add PCIe PHY driver
Il 23/03/22 07:56, Jianjun Wang ha scritto:
> Add PCIe GEN3 PHY driver support on MediaTek chipsets.
>
> Signed-off-by: Jianjun Wang <jianjun.wang@...iatek.com>
> ---
> drivers/phy/mediatek/Kconfig | 11 ++
> drivers/phy/mediatek/Makefile | 1 +
> drivers/phy/mediatek/phy-mtk-pcie.c | 272 ++++++++++++++++++++++++++++
> 3 files changed, 284 insertions(+)
> create mode 100644 drivers/phy/mediatek/phy-mtk-pcie.c
>
..snip..
> diff --git a/drivers/phy/mediatek/phy-mtk-pcie.c b/drivers/phy/mediatek/phy-mtk-pcie.c
> new file mode 100644
> index 000000000000..44a2ad8d324e
> --- /dev/null
> +++ b/drivers/phy/mediatek/phy-mtk-pcie.c
> @@ -0,0 +1,272 @@
..snip..
> +/**
> + * struct mtk_pcie_phy - PCIe phy driver main structure
> + * @dev: pointer to device
> + * @phy: pointer to generic phy
> + * @sif_base: IO mapped register base address of system interface
> + * @data: pointer to SoC dependent data
> + * @sw_efuse_en: software eFuse enable status
> + * @efuse_glb_intr: internal resistor selection of TX bias current data
> + * @efuse: pointer to eFues data for each lane
Oops! There's a typo! "eFues" => "eFuse"
After fixing this typo,
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
P.S.: Many thanks for the kerneldoc documentation!!!!
> + */
> +struct mtk_pcie_phy {
> + struct device *dev;
> + struct phy *phy;
> + void __iomem *sif_base;
> + const struct mtk_pcie_phy_data *data;
> +
> + bool sw_efuse_en;
> + u32 efuse_glb_intr;
> + struct mtk_pcie_lane_efuse *efuse;
> +};
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