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Message-Id: <20220326102712.20906-1-jbx6244@gmail.com>
Date: Sat, 26 Mar 2022 11:27:10 +0100
From: Johan Jonker <jbx6244@...il.com>
To: heiko@...ech.de
Cc: robh+dt@...nel.org, krzk+dt@...nel.org, mturquette@...libre.com,
sboyd@...nel.org, linux-clk@...r.kernel.org,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-rockchip@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: [PATCH v1 1/3] dt-bindings: clock: fix some conversion issues for rockchip,rk3399-cru.yaml
With the conversion of rockchip,rk3399-cru.txt some issues were added,
so fix them:
Changed:
Align the table with external clocks.
Remove the original author in 2016 as maintainer.
Change clocks maxItems.
Add clock-names.
Use clock-controller node name in example.
Remove assigned-xxx.
Remove ">" from description.
Signed-off-by: Johan Jonker <jbx6244@...il.com>
---
.../bindings/clock/rockchip,rk3399-cru.yaml | 32 +++++++------------
1 file changed, 11 insertions(+), 21 deletions(-)
diff --git a/Documentation/devicetree/bindings/clock/rockchip,rk3399-cru.yaml b/Documentation/devicetree/bindings/clock/rockchip,rk3399-cru.yaml
index 72b286a1b..c2763e694 100644
--- a/Documentation/devicetree/bindings/clock/rockchip,rk3399-cru.yaml
+++ b/Documentation/devicetree/bindings/clock/rockchip,rk3399-cru.yaml
@@ -7,7 +7,6 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: Rockchip RK3399 Clock and Reset Unit
maintainers:
- - Xing Zheng <zhengxing@...k-chips.com>
- Heiko Stuebner <heiko@...ech.de>
description: |
@@ -22,11 +21,11 @@ description: |
There are several clocks that are generated outside the SoC. It is expected
that they are defined using standard clock bindings with following
clock-output-names:
- - "xin24m" - crystal input - required,
- - "xin32k" - rtc clock - optional,
- - "clkin_gmac" - external GMAC clock - optional,
- - "clkin_i2s" - external I2S clock - optional,
- - "pclkin_cif" - external ISP clock - optional,
+ - "xin24m" - crystal input - required,
+ - "xin32k" - rtc clock - optional,
+ - "clkin_gmac" - external GMAC clock - optional,
+ - "clkin_i2s" - external I2S clock - optional,
+ - "pclkin_cif" - external ISP clock - optional,
- "clk_usbphy0_480m" - output clock of the pll in the usbphy0
- "clk_usbphy1_480m" - output clock of the pll in the usbphy1
@@ -46,24 +45,15 @@ properties:
const: 1
clocks:
- minItems: 1
-
- assigned-clocks:
- minItems: 1
- maxItems: 64
-
- assigned-clock-parents:
- minItems: 1
- maxItems: 64
+ maxItems: 1
- assigned-clock-rates:
- minItems: 1
- maxItems: 64
+ clock-names:
+ const: xin24m
rockchip,grf:
$ref: /schemas/types.yaml#/definitions/phandle
- description: >
- phandle to the syscon managing the "general register files". It is used
+ description:
+ Phandle to the syscon managing the "general register files". It is used
for GRF muxes, if missing any muxes present in the GRF will not be
available.
@@ -77,7 +67,7 @@ additionalProperties: false
examples:
- |
- pmucru: pmu-clock-controller@...50000 {
+ pmucru: clock-controller@...50000 {
compatible = "rockchip,rk3399-pmucru";
reg = <0xff750000 0x1000>;
#clock-cells = <1>;
--
2.20.1
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