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Message-ID: <b9ed8c1511ea26c070dd3fb61f4370e5f858058c.camel@mediatek.com>
Date:   Mon, 28 Mar 2022 13:39:55 +0800
From:   CK Hu <ck.hu@...iatek.com>
To:     Jason-JH Lin <jason-jh.lin@...iatek.com>,
        Rob Herring <robh+dt@...nel.org>,
        Matthias Brugger <matthias.bgg@...il.com>,
        Chun-Kuang Hu <chunkuang.hu@...nel.org>,
        Philipp Zabel <p.zabel@...gutronix.de>,
        AngeloGioacchino Del Regno 
        <angelogioacchino.delregno@...labora.com>
CC:     Enric Balletbo i Serra <enric.balletbo@...labora.com>,
        Maxime Coquelin <mcoquelin.stm32@...il.com>,
        David Airlie <airlied@...ux.ie>,
        Daniel Vetter <daniel@...ll.ch>,
        Alexandre Torgue <alexandre.torgue@...s.st.com>,
        <hsinyi@...omium.org>, <fshao@...omium.org>,
        <moudy.ho@...iatek.com>, <roy-cw.yeh@...iatek.com>,
        Fabien Parent <fparent@...libre.com>, <nancy.lin@...iatek.com>,
        <singo.chang@...iatek.com>, <devicetree@...r.kernel.org>,
        <linux-stm32@...md-mailman.stormreply.com>,
        <linux-arm-kernel@...ts.infradead.org>,
        <linux-mediatek@...ts.infradead.org>,
        <linux-kernel@...r.kernel.org>,
        <Project_Global_Chrome_Upstream_Group@...iatek.com>
Subject: Re: [PATCH v16 4/8] soc: mediatek: add mtk-mmsys support for mt8195
 vdosys0

Hi, Jason:

On Mon, 2022-03-28 at 13:03 +0800, Jason-JH Lin wrote:
> Hi CK,
> 
> Thanks for the reviews.
> 
> On Mon, 2022-03-07 at 11:28 +0800, jason-jh.lin wrote:
> > Add mt8195 vdosys0 clock driver name and routing table to
> > the driver data of mtk-mmsys.
> > 
> > Signed-off-by: jason-jh.lin <jason-jh.lin@...iatek.com>
> > Acked-by: AngeloGioacchino Del Regno <
> > angelogioacchino.delregno@...labora.com>
> > ---
> > Impelmentation patch of vdosys1 can be refered to [1]
> > 
> > [1] soc: mediatek: add mtk-mmsys support for mt8195 vdosys1
> > ---
> >  drivers/soc/mediatek/mt8195-mmsys.h    | 130
> > +++++++++++++++++++++++++
> >  drivers/soc/mediatek/mtk-mmsys.c       |  11 +++
> >  include/linux/soc/mediatek/mtk-mmsys.h |   9 ++
> >  3 files changed, 150 insertions(+)
> >  create mode 100644 drivers/soc/mediatek/mt8195-mmsys.h
> > 
> > diff --git a/drivers/soc/mediatek/mt8195-mmsys.h
> > b/drivers/soc/mediatek/mt8195-mmsys.h
> > new file mode 100644
> > index 000000000000..24a3afe23bc8
> > --- /dev/null
> > +++ b/drivers/soc/mediatek/mt8195-mmsys.h
> > @@ -0,0 +1,130 @@
> > +/* SPDX-License-Identifier: GPL-2.0-only */
> > +
> > +#ifndef __SOC_MEDIATEK_MT8195_MMSYS_H
> > +#define __SOC_MEDIATEK_MT8195_MMSYS_H
> > +
> > +#define MT8195_VDO0_OVL_MOUT_EN					
> > 0xf14
> > +#define MT8195_MOUT_DISP_OVL0_TO_DISP_RDMA0			
> > BIT(0)
> > +#define MT8195_MOUT_DISP_OVL0_TO_DISP_WDMA0			
> > BIT(1)
> >  
> > Useless, so remove.
> > 
> > +#define MT8195_MOUT_DISP_OVL0_TO_DISP_OVL1			BIT(2)
> > Ditto.Useless, so remove.
> > Regards,
> > CK
> 
> Although these definitions are not used, they represent the
> functionality provided by this register.
> 
> I think we can show that we have these capabilities by defining them.
> 
> Can we keep these definitions?

It's better that we know how to use it. Even though the symbol name
show some information, but I would like to add it to
mmsys_mt8195_routing_table[].

Regards,
CK

> 
> Regards,
> Jason-JH.Lin
> 
> > +#define MT8195_MOUT_DISP_OVL1_TO_DISP_RDMA1			
> > BIT(4)
> > +#define MT8195_MOUT_DISP_OVL1_TO_DISP_WDMA1			
> > BIT(5)
> > +#define MT8195_MOUT_DISP_OVL1_TO_DISP_OVL0			BIT(6)
> 
> 
> [snip]
> 

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