| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Date: Mon, 28 Mar 2022 19:45:21 +0530
From: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
To: Serge Semin <Sergey.Semin@...kalelectronics.ru>
Cc: Gustavo Pimentel <gustavo.pimentel@...opsys.com>,
Vinod Koul <vkoul@...nel.org>,
Jingoo Han <jingoohan1@...il.com>,
Bjorn Helgaas <bhelgaas@...gle.com>,
Frank Li <Frank.Li@....com>,
Lorenzo Pieralisi <lorenzo.pieralisi@....com>,
Rob Herring <robh@...nel.org>,
Krzysztof Wilczyński <kw@...ux.com>,
Serge Semin <fancer.lancer@...il.com>,
Alexey Malahov <Alexey.Malahov@...kalelectronics.ru>,
Pavel Parkhomenko <Pavel.Parkhomenko@...kalelectronics.ru>,
linux-pci@...r.kernel.org, dmaengine@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH 25/25] PCI: dwc: Add DW eDMA engine support
On Thu, Mar 24, 2022 at 04:48:36AM +0300, Serge Semin wrote:
> Since the DW eDMA driver now supports eDMA controllers embedded into the
> locally accessible DW PCIe Root Ports and End-points, we can use the
> updated interface to register DW eDMA as DMA engine device if it's
> available. In order to successfully do that the DW PCIe core driver need
> to perform some preparations first. First of all it needs to find out the
> eDMA controller CSRs base address, whether they are accessible over the
> Port Logic or iATU unrolled space. Afterwards it can try to auto-detect
> the eDMA controller availability and number of it's read/write channels.
> If none was found the procedure will just silently halt with no error
> returned. Secondly the platform is supposed to provide either combined or
> per-channel IRQ signals. If no valid IRQs set is found the procedure will
> also halt with no error returned so to be backward compatible with
> platforms where DW PCIe controllers have eDMA embedded but lack of the
> IRQs defined for them. Finally before actually probing the eDMA device we
> need to allocate LLP items buffers. After that the DW eDMA can be
> registered. If registration is successful the info-message regarding the
> number of detected Read/Write eDMA channels will be printed to the system
> log in the same way as it's done for iATU settings.
>
> Signed-off-by: Serge Semin <Sergey.Semin@...kalelectronics.ru>
> ---
> .../pci/controller/dwc/pcie-designware-ep.c | 4 +
> .../pci/controller/dwc/pcie-designware-host.c | 13 +-
> drivers/pci/controller/dwc/pcie-designware.c | 188 ++++++++++++++++++
> drivers/pci/controller/dwc/pcie-designware.h | 23 ++-
> 4 files changed, 225 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/pci/controller/dwc/pcie-designware-ep.c b/drivers/pci/controller/dwc/pcie-designware-ep.c
> index 23401f17e8f0..b2840d1a5b9a 100644
> --- a/drivers/pci/controller/dwc/pcie-designware-ep.c
> +++ b/drivers/pci/controller/dwc/pcie-designware-ep.c
> @@ -712,6 +712,10 @@ int dw_pcie_ep_init(struct dw_pcie_ep *ep)
>
> dw_pcie_iatu_detect(pci);
>
> + ret = dw_pcie_edma_detect(pci);
> + if (ret)
> + return ret;
> +
> res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "addr_space");
> if (!res)
> return -EINVAL;
eDMA needs to be removed on error path
> diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c
> index 715a13b90e43..048b452ee4f3 100644
> --- a/drivers/pci/controller/dwc/pcie-designware-host.c
> +++ b/drivers/pci/controller/dwc/pcie-designware-host.c
> @@ -405,14 +405,18 @@ int dw_pcie_host_init(struct pcie_port *pp)
>
> dw_pcie_iatu_detect(pci);
>
> - ret = dw_pcie_setup_rc(pp);
> + ret = dw_pcie_edma_detect(pci);
> if (ret)
> goto err_free_msi;
>
> + ret = dw_pcie_setup_rc(pp);
> + if (ret)
> + goto err_edma_remove;
> +
> if (!dw_pcie_link_up(pci) && pci->ops && pci->ops->start_link) {
> ret = pci->ops->start_link(pci);
> if (ret)
> - goto err_free_msi;
> + goto err_edma_remove;
> }
>
> /* Ignore errors, the link may come up later */
> @@ -430,6 +434,9 @@ int dw_pcie_host_init(struct pcie_port *pp)
> if (pci->ops && pci->ops->stop_link)
> pci->ops->stop_link(pci);
>
> +err_edma_remove:
> + dw_pcie_edma_remove(pci);
> +
> err_free_msi:
> if (pp->has_msi_ctrl)
> dw_pcie_free_msi(pp);
> @@ -452,6 +459,8 @@ void dw_pcie_host_deinit(struct pcie_port *pp)
> if (pci->ops && pci->ops->stop_link)
> pci->ops->stop_link(pci);
>
> + dw_pcie_edma_remove(pci);
> +
> if (pp->has_msi_ctrl)
> dw_pcie_free_msi(pp);
>
> diff --git a/drivers/pci/controller/dwc/pcie-designware.c b/drivers/pci/controller/dwc/pcie-designware.c
> index 4a95a7b112e9..dbe39a7ecb71 100644
> --- a/drivers/pci/controller/dwc/pcie-designware.c
> +++ b/drivers/pci/controller/dwc/pcie-designware.c
[...]
> +int dw_pcie_edma_detect(struct dw_pcie *pci)
> +{
> + int ret;
> +
> + pci->edma.dev = pci->dev;
> + if (!pci->edma.ops)
> + pci->edma.ops = &dw_pcie_edma_ops;
> + pci->edma.flags |= DW_EDMA_CHIP_LOCAL;
> +
> + pci->edma_unroll_enabled = dw_pcie_edma_unroll_enabled(pci);
Is is possible to continue the unroll path for eDMA if iATU unroll is enabled?
> + if (pci->edma_unroll_enabled && pci->iatu_unroll_enabled) {
> + pci->edma.mf = EDMA_MF_EDMA_UNROLL;
> + if (pci->atu_base != pci->dbi_base + DEFAULT_DBI_ATU_OFFSET)
> + pci->edma.reg_base = pci->atu_base + PCIE_DMA_UNROLL_BASE;
> + else
> + pci->edma.reg_base = pci->dbi_base + DEFAULT_DBI_DMA_OFFSET;
This assumption won't work on all platforms. Atleast on our platform, the
offsets vary. So I'd suggest to try getting the reg_base from DT first and use
these offsets as a fallback as we do for iATU.
> + } else {
> + pci->edma.mf = EDMA_MF_EDMA_LEGACY;
> + pci->edma.reg_base = pci->dbi_base + PCIE_DMA_VIEWPORT_BASE;
> + }
> +
> + ret = dw_pcie_edma_detect_channels(pci);
> + if (ret) {
> + dev_err(pci->dev, "Unexpected NoF eDMA channels found\n");
> + return ret;
> + }
> +
> + /* Skip any further initialization if no eDMA found */
Should we introduce a new Kconfig option for enabling eDMA? My concern here is,
if eDMA is really needed for an usecase and if the platform support is broken
somehow (DT issues?), then we'll just simply go ahead without probe failure and
it may break somewhere else.
And we are returning errors if something wrong happens during eDMA probe. This
might annoy the existing users who don't care about eDMA but turning those
errors to debug will affect the real users of eDMA.
For these reasons, I think it'd be better to probe eDMA only if the Kconfig
option is enabled (which would be disabled by default). And properly return the
failure.
Thanks,
Mani
Powered by blists - more mailing lists