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Date:   Tue, 29 Mar 2022 11:46:18 +0300
From:   Maxim Levitsky <mlevitsk@...hat.com>
To:     Paolo Bonzini <pbonzini@...hat.com>, kvm@...r.kernel.org
Cc:     Ingo Molnar <mingo@...hat.com>, Borislav Petkov <bp@...en8.de>,
        Sean Christopherson <seanjc@...gle.com>,
        Vitaly Kuznetsov <vkuznets@...hat.com>,
        "H. Peter Anvin" <hpa@...or.com>, Joerg Roedel <joro@...tes.org>,
        linux-kernel@...r.kernel.org, Thomas Gleixner <tglx@...utronix.de>,
        Jim Mattson <jmattson@...gle.com>, x86@...nel.org,
        Dave Hansen <dave.hansen@...ux.intel.com>,
        Wanpeng Li <wanpengli@...cent.com>
Subject: Re: [PATCH v4 2/6] KVM: x86: nSVM: implement nested LBR
 virtualization

On Mon, 2022-03-28 at 19:12 +0200, Paolo Bonzini wrote:
> On 3/27/22 17:12, Maxim Levitsky wrote:
> > - with LBR virtualization supported, the guest can set this msr to any value
> > as long as it doesn't set reserved bits and then read back the written value,
> > but it is not used by the CPU, unless LBR bit is set in MSR_IA32_DEBUGCTLMSR,
> > because only then LBR virtualization is enabled, which makes the CPU
> > load the guest value on VM entry.
> >   
> > This means that MSR_IA32_DEBUGCTLMSR.BTF will magically start working when
> > MSR_IA32_DEBUGCTLMSR.LBR is set as well, and will not work otherwise.
> 
> That can be fixed by context-switching DEBUGCTLMSR by hand when LBR=0 && 
> BTF=1.  Would you like to give it a shot?
> 
> Paolo
> 
Yep exactly, I didn't do that yet only because mypatches didn't made it worse,
so I wanted to do this in a separate patch (+unit test), and it kind of
went to my backlog. I'll do that soon.

Best regards,
	Maxim Levitsky

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