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Message-ID: <20220329114540.17140-2-tinghan.shen@mediatek.com>
Date:   Tue, 29 Mar 2022 19:45:38 +0800
From:   Tinghan Shen <tinghan.shen@...iatek.com>
To:     Chaotian Jing <chaotian.jing@...iatek.com>,
        Ulf Hansson <ulf.hansson@...aro.org>,
        Rob Herring <robh+dt@...nel.org>,
        "Krzysztof Kozlowski" <krzysztof.kozlowski@...onical.com>,
        Matthias Brugger <matthias.bgg@...il.com>,
        AngeloGioacchino Del Regno 
        <angelogioacchino.delregno@...labora.com>,
        Wenbin Mei <wenbin.mei@...iatek.com>
CC:     <linux-mmc@...r.kernel.org>, <devicetree@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        <linux-mediatek@...ts.infradead.org>,
        <Project_Global_Chrome_Upstream_Group@...iatek.com>,
        <ryder.lee@...nel.org>, <wenst@...omium.org>,
        <chunfeng.yun@...iatek.com>,
        Tinghan Shen <tinghan.shen@...iatek.com>
Subject: [PATCH v12 1/3] dt-bindings: mmc: mtk-sd: fix yamllint error

Documentation/devicetree/bindings/mmc/mtk-sd.yaml
  54:81     error    line too long (95 > 80 characters)  (line-length)

Signed-off-by: Tinghan Shen <tinghan.shen@...iatek.com>
---
 Documentation/devicetree/bindings/mmc/mtk-sd.yaml | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/mmc/mtk-sd.yaml b/Documentation/devicetree/bindings/mmc/mtk-sd.yaml
index 297ada03e3de..7032f7adf3ca 100644
--- a/Documentation/devicetree/bindings/mmc/mtk-sd.yaml
+++ b/Documentation/devicetree/bindings/mmc/mtk-sd.yaml
@@ -50,7 +50,8 @@ properties:
       - description: source clock (required).
       - description: HCLK which used for host (required).
       - description: independent source clock gate (required for MT2712).
-      - description: bus clock used for internal register access (required for MT2712 MSDC0/3).
+      - description: bus clock used for internal register access
+                     (required for MT2712 MSDC0/3).
       - description: msdc subsys clock gate (required for MT8192).
       - description: peripheral bus clock gate (required for MT8192).
       - description: AXI bus clock gate (required for MT8192).
-- 
2.18.0

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