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Message-ID: <CAL_Jsq+zO7RXzQLoPXR7Zm0mcsKCydK=8EFaNFGu-_THgJuh7Q@mail.gmail.com>
Date: Tue, 29 Mar 2022 08:27:50 -0500
From: Rob Herring <robh+dt@...nel.org>
To: Sui Jingfeng <15330273260@....cn>
Cc: Maxime Ripard <mripard@...nel.org>,
Thomas Zimmermann <tzimmermann@...e.de>,
Roland Scheidegger <sroland@...are.com>,
Zack Rusin <zackr@...are.com>,
Christian Gmeiner <christian.gmeiner@...il.com>,
David Airlie <airlied@...ux.ie>,
Daniel Vetter <daniel@...ll.ch>,
Thomas Bogendoerfer <tsbogend@...ha.franken.de>,
Dan Carpenter <dan.carpenter@...cle.com>,
Krzysztof Kozlowski <krzk@...nel.org>,
Andrey Zhizhikin <andrey.zhizhikin@...ca-geosystems.com>,
Sam Ravnborg <sam@...nborg.org>,
"David S . Miller" <davem@...emloft.net>,
Jiaxun Yang <jiaxun.yang@...goat.com>,
Lucas Stach <l.stach@...gutronix.de>,
Maarten Lankhorst <maarten.lankhorst@...ux.intel.com>,
Ilia Mirkin <imirkin@...m.mit.edu>,
Qing Zhang <zhangqing@...ngson.cn>,
suijingfeng <suijingfeng@...ngson.cn>,
"open list:MIPS" <linux-mips@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
devicetree@...r.kernel.org,
dri-devel <dri-devel@...ts.freedesktop.org>
Subject: Re: [PATCH v13 3/6] dt-bindings: display: Add Loongson display controller
On Sun, Mar 27, 2022 at 9:29 PM Sui Jingfeng <15330273260@....cn> wrote:
>
> Add DT bindings and simple usages for Loongson display controller
> found in LS7A1000 bridge chip and LS2k1000 SoC.
>
> Signed-off-by: Sui Jingfeng <15330273260@....cn>
> ---
> .../loongson/loongson,display-controller.yaml | 321 ++++++++++++++++++
> 1 file changed, 321 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/display/loongson/loongson,display-controller.yaml
>
> diff --git a/Documentation/devicetree/bindings/display/loongson/loongson,display-controller.yaml b/Documentation/devicetree/bindings/display/loongson/loongson,display-controller.yaml
> new file mode 100644
> index 000000000000..34060ed55a25
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/display/loongson/loongson,display-controller.yaml
> @@ -0,0 +1,321 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/display/loongson/loongson,display-controller.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Loongson LS7A1000/LS2K1000/LS2K0500 Display Controller Device Tree Bindings
> +
> +maintainers:
> + - Sui Jingfeng <suijingfeng@...ngson.cn>
> +
> +description: |+
> +
> + Loongson display controllers are simple which require scanout buffers
> + to be physically contiguous. LS2K1000/LS2K0500 is a SOC, only system
> + memory is available. LS7A1000/LS7A2000 is bridge chip which is equipped
> + with a dedicated video RAM which is 64MB or more, precise size can be
> + read from the PCI BAR 2 of the GPU device(0x0014:0x7A15) in the bridge
> + chip.
> +
> + LSDC has two display pipes, each way has a DVO interface which provide
> + RGB888 signals, vertical & horizontal synchronisations, data enable and
> + the pixel clock. LSDC has two CRTC, each CRTC is able to scanout from
> + 1920x1080 resolution at 60Hz. Each CRTC has two FB address registers.
> +
> + For LS7A1000, there are 4 dedicated GPIOs whose control register is
> + located at the DC register space. They are used to emulate two way i2c,
> + One for DVO0, another for DVO1.
> +
> + LS2K1000 and LS2K0500 SoC grab i2c adapter from other module, either
> + general purpose GPIO emulated i2c or hardware i2c in the SoC.
> +
> + LSDC's display pipeline have several components as below description,
> +
> + The display controller in LS7A1000:
> + ___________________ _________
> + | -------| | |
> + | CRTC0 --> | DVO0 ----> Encoder0 ---> Connector0 ---> | Monitor |
> + | _ _ -------| ^ ^ |_________|
> + | | | | | -------| | |
> + | |_| |_| | i2c0 <--------+-------------+
> + | -------|
> + | DC IN LS7A1000 |
> + | _ _ -------|
> + | | | | | | i2c1 <--------+-------------+
> + | |_| |_| -------| | | _________
> + | -------| | | | |
> + | CRTC1 --> | DVO1 ----> Encoder1 ---> Connector1 ---> | Panel |
> + | -------| |_________|
> + |___________________|
> +
> + Simple usage of LS7A1000 with LS3A4000 CPU:
> +
> + +------+ +------------------------------------+
> + | DDR4 | | +-------------------+ |
> + +------+ | | PCIe Root complex | LS7A1000 |
> + || MC0 | +--++---------++----+ |
> + +----------+ HT 3.0 | || || |
> + | LS3A4000 |<-------->| +---++---+ +--++--+ +---------+ +------+
> + | CPU |<-------->| | GC1000 | | LSDC |<--->| DDR3 MC |<->| VRAM |
> + +----------+ | +--------+ +-+--+-+ +---------+ +------+
> + || MC1 +---------------|--|-----------------+
> + +------+ | |
> + | DDR4 | +-------+ DVO0 | | DVO1 +------+
> + +------+ VGA <--|ADV7125|<--------+ +-------->|TFP410|--> DVI/HDMI
> + +-------+ +------+
> +
> + The display controller in LS2K1000/LS2K0500:
> + ___________________ _________
> + | -------| | |
> + | CRTC0 --> | DVO0 ----> Encoder0 ---> Connector0 ---> | Monitor |
> + | _ _ -------| ^ ^ |_________|
> + | | | | | | | |
> + | |_| |_| | +------+ |
> + | <---->| i2c0 |<---------+
> + | DC IN LS2K1000 | +------+
> + | _ _ | +------+
> + | | | | | <---->| i2c1 |----------+
> + | |_| |_| | +------+ | _________
> + | -------| | | | |
> + | CRTC1 --> | DVO1 ----> Encoder1 ---> Connector1 ---> | Panel |
> + | -------| |_________|
> + |___________________|
> +
> +properties:
> + $nodename:
> + pattern: "^display-controller@[0-9a-f],[0-9a-f]$"
> +
> + compatible:
> + oneOf:
> + - items:
> + - enum:
> + - loongson,ls7a1000-dc
> + - loongson,ls2k1000-dc
> + - loongson,ls2k0500-dc
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + maxItems: 1
> +
> + '#address-cells':
> + const: 1
> +
> + '#size-cells':
> + const: 0
> +
> + i2c@6:
NAK on made-up bus numbers. See v11 discussion for details.
Rob
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