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Message-ID: <4b1cc5a9-a081-bbc9-40af-e8e33061e64e@arm.com>
Date:   Wed, 30 Mar 2022 17:45:03 +0100
From:   James Morse <james.morse@....com>
To:     Rob Herring <robh@...nel.org>
Cc:     x86@...nel.org, linux-kernel@...r.kernel.org,
        Fenghua Yu <fenghua.yu@...el.com>,
        Reinette Chatre <reinette.chatre@...el.com>,
        Thomas Gleixner <tglx@...utronix.de>,
        Ingo Molnar <mingo@...hat.com>, Borislav Petkov <bp@...en8.de>,
        H Peter Anvin <hpa@...or.com>,
        Babu Moger <Babu.Moger@....com>,
        shameerali.kolothum.thodi@...wei.com,
        Jamie Iles <jamie@...iainc.com>,
        D Scott Phillips OS <scott@...amperecomputing.com>,
        lcherian@...vell.com, bobo.shaobowang@...wei.com,
        tan.shaopeng@...itsu.com
Subject: Re: [PATCH v3 16/21] x86/resctrl: Pass the required parameters into
 resctrl_arch_rmid_read()

Hi Rob,

On 23/03/2022 20:58, Rob Herring wrote:
> On Thu, Feb 17, 2022 at 06:21:05PM +0000, James Morse wrote:
>> resctrl_arch_rmid_read() is intended as the function that an
>> architecture agnostic resctrl filesystem driver can use to
>> read a value in bytes from a hardware register. Currently the function
>> returns the MBM values in chunks directly from hardware.
>>
>> To convert this to bytes, some correction and overflow calculations
>> are needed. These depend on the resource and domain structures.
>> Overflow detection requires the old chunks value. None of this
>> is available to resctrl_arch_rmid_read(). MPAM requires the
>> resource and domain structures to find the MMIO device that holds
>> the registers.

>> diff --git a/arch/x86/kernel/cpu/resctrl/monitor.c b/arch/x86/kernel/cpu/resctrl/monitor.c
>> index b6ad290fda8d..277c22f8c976 100644
>> --- a/arch/x86/kernel/cpu/resctrl/monitor.c
>> +++ b/arch/x86/kernel/cpu/resctrl/monitor.c
>> @@ -167,10 +167,14 @@ void resctrl_arch_reset_rmid(struct rdt_resource *r, struct rdt_domain *d,
>>  		memset(am, 0, sizeof(*am));
>>  }
>>  
>> -int resctrl_arch_rmid_read(u32 rmid, enum resctrl_event_id eventid, u64 *val)
>> +int resctrl_arch_rmid_read(struct rdt_resource *r, struct rdt_domain *d,
>> +			   u32 rmid, enum resctrl_event_id eventid, u64 *val)
>>  {
>>  	u64 msr_val;
>>  
>> +	if (!cpumask_test_cpu(smp_processor_id(), &d->cpu_mask))

> We already tested this and disabled preemption. (At least from some 
> caller AFAICT from this patch.) I'd assume we'd want the fs code to 
> handle preemption disable and checking cpumask. In any case, it should 
> be clear what guarantees resctrl_arch_rmid_read() has.

This started as a lockdep warning for things that don't matter on x86, but would break
arm64. Combined with some half baked thinking about RT.

I'll add a comment, (in the header file).

It needs to be called on the correct CPU, but from process context as MPAM needs to send
IPI from here. I didn't want to add a preempt_disable() lockdep annotation here as its not
pre-emption that's the problem, but migration. cqm_handle_limbo() and
mbm_handle_overflow() are the two main routes in here, and they both use
schedule_delayed_work_on() to target the 'correct' CPU.


Thanks,

James

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