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Message-Id: <20220330222834.139769-1-jarkko@kernel.org>
Date:   Thu, 31 Mar 2022 01:28:34 +0300
From:   Jarkko Sakkinen <jarkko@...nel.org>
To:     Shuah Khan <shuah@...nel.org>
Cc:     linux-sgx@...r.kernel.org, nathaniel@...fian.com,
        Jarkko Sakkinen <jarkko@...nel.org>,
        Reinette Chatre <reinette.chatre@...el.com>,
        Dave Hansen <dave.hansen@...ux.intel.com>,
        linux-kselftest@...r.kernel.org (open list:KERNEL SELFTEST FRAMEWORK),
        linux-kernel@...r.kernel.org (open list)
Subject: [PATCH v2] selftests/sgx: Use rip relative addressing for encl_stack

Simplify the test_encl_bootstrap.S flow by using RIP-relative addressing.
The compiler automatically puts relative addresses for RIP index addresses.

In order to get a clean and tweakless solution, define separate entry point
for each TCS.

Cc: Reinette Chatre <reinette.chatre@...el.com>
Cc: Dave Hansen <dave.hansen@...ux.intel.com>
Signed-off-by: Jarkko Sakkinen <jarkko@...nel.org>
---
v2:
* Based on Reinette's example, make proper structuring with separate
  entry points for each TCS.
---
 .../selftests/sgx/test_encl_bootstrap.S       | 30 +++++++++++--------
 1 file changed, 18 insertions(+), 12 deletions(-)

diff --git a/tools/testing/selftests/sgx/test_encl_bootstrap.S b/tools/testing/selftests/sgx/test_encl_bootstrap.S
index 82fb0dfcbd23..cc2353f38bcc 100644
--- a/tools/testing/selftests/sgx/test_encl_bootstrap.S
+++ b/tools/testing/selftests/sgx/test_encl_bootstrap.S
@@ -10,12 +10,13 @@
 	.section ".tcs", "aw"
 	.balign	4096
 
+encl_tcs1:
 	.fill	1, 8, 0			# STATE (set by CPU)
 	.fill	1, 8, 0			# FLAGS
 	.quad	encl_ssa_tcs1		# OSSA
 	.fill	1, 4, 0			# CSSA (set by CPU)
 	.fill	1, 4, 1			# NSSA
-	.quad	encl_entry		# OENTRY
+	.quad	encl_entry1		# OENTRY
 	.fill	1, 8, 0			# AEP (set by EENTER and ERESUME)
 	.fill	1, 8, 0			# OFSBASE
 	.fill	1, 8, 0			# OGSBASE
@@ -23,13 +24,13 @@
 	.fill	1, 4, 0xFFFFFFFF	# GSLIMIT
 	.fill	4024, 1, 0		# Reserved
 
-	# TCS2
+encl_tcs2:
 	.fill	1, 8, 0			# STATE (set by CPU)
 	.fill	1, 8, 0			# FLAGS
 	.quad	encl_ssa_tcs2		# OSSA
 	.fill	1, 4, 0			# CSSA (set by CPU)
 	.fill	1, 4, 1			# NSSA
-	.quad	encl_entry		# OENTRY
+	.quad	encl_entry2		# OENTRY
 	.fill	1, 8, 0			# AEP (set by EENTER and ERESUME)
 	.fill	1, 8, 0			# OFSBASE
 	.fill	1, 8, 0			# OGSBASE
@@ -39,15 +40,19 @@
 
 	.text
 
-encl_entry:
-	# RBX contains the base address for TCS, which is the first address
-	# inside the enclave for TCS #1 and one page into the enclave for
-	# TCS #2. By adding the value of encl_stack to it, we get
-	# the absolute address for the stack.
-	lea	(encl_stack)(%rbx), %rax
+encl_entry1:
+	lea	(encl_stack1)(%rip), %rax
 	xchg	%rsp, %rax
 	push	%rax
+	jmp	encl_continue
 
+encl_entry2:
+	lea	(encl_stack2)(%rip), %rax
+	xchg	%rsp, %rax
+	push	%rax
+	jmp	encl_continue
+
+encl_continue:
 	push	%rcx # push the address after EENTER
 	push	%rbx # push the enclave base address
 
@@ -84,13 +89,14 @@ encl_entry:
 
 encl_ssa_tcs1:
 	.space 4096
+
 encl_ssa_tcs2:
 	.space 4096
 
+encl_stack1:
 	.balign 4096
-	# Stack of TCS #1
 	.space 4096
-encl_stack:
+
+encl_stack2:
 	.balign 4096
-	# Stack of TCS #2
 	.space 4096
-- 
2.35.1

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