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Date:   Wed, 30 Mar 2022 15:27:21 +0800
From:   Haowen Bai <baihaowen@...zu.com>
To:     Larry Finger <Larry.Finger@...inger.net>,
        Phillip Potter <phil@...lpotter.co.uk>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>
CC:     Haowen Bai <baihaowen@...zu.com>, <linux-staging@...ts.linux.dev>,
        <linux-kernel@...r.kernel.org>
Subject: [PATCH V2] staging: r8188eu: Fix misspelling in comment "Tranceiver" -> "Transceiver"

This patch fixes some spelling typo in error message reported by 
checkpatch.pl

WARNING: 'Tranceiver' may be misspelled - perhaps 'Transceiver'?
WARNING: 'Tranceiver' may be misspelled - perhaps 'Transceiver'?
WARNING: 'Tranceiver' may be misspelled - perhaps 'Transceiver'?
WARNING: 'Tranceiver' may be misspelled - perhaps 'Transceiver'?

Signed-off-by: Haowen Bai <baihaowen@...zu.com>
---
V1->V2: split one-patch-per-misspelled-word; change title;

 drivers/staging/r8188eu/hal/rtl8188e_phycfg.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/staging/r8188eu/hal/rtl8188e_phycfg.c b/drivers/staging/r8188eu/hal/rtl8188e_phycfg.c
index ea75ff1..4864daf 100644
--- a/drivers/staging/r8188eu/hal/rtl8188e_phycfg.c
+++ b/drivers/staging/r8188eu/hal/rtl8188e_phycfg.c
@@ -378,10 +378,10 @@ phy_InitBBRFRegisterDefinition(
 	/*  Tx AGC Gain Stage (same for all path. Should we remove this?) */
 	pHalData->PHYRegDef.rfTxGainStage = rFPGA0_TxGainStage; /* Tx gain stage */
 
-	/*  Tranceiver A~D HSSI Parameter-1 */
+	/*  Transceiver A~D HSSI Parameter-1 */
 	pHalData->PHYRegDef.rfHSSIPara1 = rFPGA0_XA_HSSIParameter1;  /* wire control parameter1 */
 
-	/*  Tranceiver A~D HSSI Parameter-2 */
+	/*  Transceiver A~D HSSI Parameter-2 */
 	pHalData->PHYRegDef.rfHSSIPara2 = rFPGA0_XA_HSSIParameter2;  /* wire control parameter2 */
 
 	/*  RF switch Control */
@@ -405,10 +405,10 @@ phy_InitBBRFRegisterDefinition(
 	/*  Tx AFE control 2 */
 	pHalData->PHYRegDef.rfTxAFE = rOFDM0_XATxAFE;
 
-	/*  Tranceiver LSSI Readback SI mode */
+	/*  Transceiver LSSI Readback SI mode */
 	pHalData->PHYRegDef.rfLSSIReadBack = rFPGA0_XA_LSSIReadBack;
 
-	/*  Tranceiver LSSI Readback PI mode */
+	/*  Transceiver LSSI Readback PI mode */
 	pHalData->PHYRegDef.rfLSSIReadBackPi = TransceiverA_HSPI_Readback;
 }
 
-- 
2.7.4

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