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Date: Wed, 30 Mar 2022 14:32:36 +0200
From: Fabien DESSENNE <fabien.dessenne@...s.st.com>
To: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>,
Qianggui Song <qianggui.song@...ogic.com>,
Krzysztof Kozlowski <krzk@...nel.org>,
<linux-gpio@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-amlogic@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>, <openbmc@...ts.ozlabs.org>,
<linux-renesas-soc@...r.kernel.org>,
<linux-samsung-soc@...r.kernel.org>,
<linux-stm32@...md-mailman.stormreply.com>
CC: Linus Walleij <linus.walleij@...aro.org>,
Neil Armstrong <narmstrong@...libre.com>,
Kevin Hilman <khilman@...libre.com>,
Jerome Brunet <jbrunet@...libre.com>,
Martin Blumenstingl <martin.blumenstingl@...glemail.com>,
Andrew Lunn <andrew@...n.ch>,
Gregory Clement <gregory.clement@...tlin.com>,
Sebastian Hesselbarth <sebastian.hesselbarth@...il.com>,
Avi Fishman <avifishman70@...il.com>,
Tomer Maimon <tmaimon77@...il.com>,
Tali Perry <tali.perry1@...il.com>,
Patrick Venture <venture@...gle.com>,
Nancy Yuen <yuenn@...gle.com>,
Benjamin Fair <benjaminfair@...gle.com>,
Geert Uytterhoeven <geert+renesas@...der.be>,
Tomasz Figa <tomasz.figa@...il.com>,
Sylwester Nawrocki <s.nawrocki@...sung.com>,
Alim Akhtar <alim.akhtar@...sung.com>,
Maxime Coquelin <mcoquelin.stm32@...il.com>,
Alexandre Torgue <alexandre.torgue@...s.st.com>,
Bartosz Golaszewski <brgl@...ev.pl>,
Philipp Zabel <p.zabel@...gutronix.de>
Subject: Re: [PATCH v2 04/13] pinctrl: stm32: Switch to use
for_each_gpiochip_node() helper
Hi Andy
Thank you for the patch.
Fabien
On 29/03/2022 17:29, Andy Shevchenko wrote:
> Switch the code to use for_each_gpiochip_node() helper.
>
> While at it, in order to avoid additional churn in the future,
> switch to fwnode APIs where it makes sense.
>
> Signed-off-by: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
Reviewed-by: Fabien Dessenne <fabien.dessenne@...s.st.com>
> ---
> drivers/pinctrl/stm32/pinctrl-stm32.c | 72 ++++++++++++---------------
> 1 file changed, 33 insertions(+), 39 deletions(-)
>
> diff --git a/drivers/pinctrl/stm32/pinctrl-stm32.c b/drivers/pinctrl/stm32/pinctrl-stm32.c
> index 4043a44211f0..3e2f1e3a84be 100644
> --- a/drivers/pinctrl/stm32/pinctrl-stm32.c
> +++ b/drivers/pinctrl/stm32/pinctrl-stm32.c
> @@ -24,6 +24,7 @@
> #include <linux/pinctrl/pinctrl.h>
> #include <linux/pinctrl/pinmux.h>
> #include <linux/platform_device.h>
> +#include <linux/property.h>
> #include <linux/regmap.h>
> #include <linux/reset.h>
> #include <linux/slab.h>
> @@ -1215,13 +1216,12 @@ static const struct pinconf_ops stm32_pconf_ops = {
> .pin_config_dbg_show = stm32_pconf_dbg_show,
> };
>
> -static int stm32_gpiolib_register_bank(struct stm32_pinctrl *pctl,
> - struct device_node *np)
> +static int stm32_gpiolib_register_bank(struct stm32_pinctrl *pctl, struct fwnode_handle *fwnode)
> {
> struct stm32_gpio_bank *bank = &pctl->banks[pctl->nbanks];
> int bank_ioport_nr;
> struct pinctrl_gpio_range *range = &bank->range;
> - struct of_phandle_args args;
> + struct fwnode_reference_args args;
> struct device *dev = pctl->dev;
> struct resource res;
> int npins = STM32_GPIO_PINS_PER_BANK;
> @@ -1230,7 +1230,7 @@ static int stm32_gpiolib_register_bank(struct stm32_pinctrl *pctl,
> if (!IS_ERR(bank->rstc))
> reset_control_deassert(bank->rstc);
>
> - if (of_address_to_resource(np, 0, &res))
> + if (of_address_to_resource(to_of_node(fwnode), 0, &res))
> return -ENODEV;
>
> bank->base = devm_ioremap_resource(dev, &res);
> @@ -1245,15 +1245,15 @@ static int stm32_gpiolib_register_bank(struct stm32_pinctrl *pctl,
>
> bank->gpio_chip = stm32_gpio_template;
>
> - of_property_read_string(np, "st,bank-name", &bank->gpio_chip.label);
> + fwnode_property_read_string(fwnode, "st,bank-name", &bank->gpio_chip.label);
>
> - if (!of_parse_phandle_with_fixed_args(np, "gpio-ranges", 3, i, &args)) {
> + if (!fwnode_property_get_reference_args(fwnode, "gpio-ranges", NULL, 3, i, &args)) {
> bank_nr = args.args[1] / STM32_GPIO_PINS_PER_BANK;
> bank->gpio_chip.base = args.args[1];
>
> /* get the last defined gpio line (offset + nb of pins) */
> npins = args.args[0] + args.args[2];
> - while (!of_parse_phandle_with_fixed_args(np, "gpio-ranges", 3, ++i, &args))
> + while (!fwnode_property_get_reference_args(fwnode, "gpio-ranges", NULL, 3, ++i, &args))
> npins = max(npins, (int)(args.args[0] + args.args[2]));
> } else {
> bank_nr = pctl->nbanks;
> @@ -1268,20 +1268,20 @@ static int stm32_gpiolib_register_bank(struct stm32_pinctrl *pctl,
> &pctl->banks[bank_nr].range);
> }
>
> - if (of_property_read_u32(np, "st,bank-ioport", &bank_ioport_nr))
> + if (fwnode_property_read_u32(fwnode, "st,bank-ioport", &bank_ioport_nr))
> bank_ioport_nr = bank_nr;
>
> bank->gpio_chip.base = bank_nr * STM32_GPIO_PINS_PER_BANK;
>
> bank->gpio_chip.ngpio = npins;
> - bank->gpio_chip.of_node = np;
> + bank->gpio_chip.fwnode = fwnode;
> bank->gpio_chip.parent = dev;
> bank->bank_nr = bank_nr;
> bank->bank_ioport_nr = bank_ioport_nr;
> spin_lock_init(&bank->lock);
>
> /* create irq hierarchical domain */
> - bank->fwnode = of_node_to_fwnode(np);
> + bank->fwnode = fwnode;
>
> bank->domain = irq_domain_create_hierarchy(pctl->domain, 0,
> STM32_GPIO_IRQ_LINE, bank->fwnode,
> @@ -1418,7 +1418,7 @@ static int stm32_pctrl_create_pins_tab(struct stm32_pinctrl *pctl,
> int stm32_pctl_probe(struct platform_device *pdev)
> {
> struct device_node *np = pdev->dev.of_node;
> - struct device_node *child;
> + struct fwnode_handle *child;
> const struct of_device_id *match;
> struct device *dev = &pdev->dev;
> struct stm32_pinctrl *pctl;
> @@ -1525,40 +1525,34 @@ int stm32_pctl_probe(struct platform_device *pdev)
> return -ENOMEM;
>
> i = 0;
> - for_each_available_child_of_node(np, child) {
> + for_each_gpiochip_node(dev, child) {
> struct stm32_gpio_bank *bank = &pctl->banks[i];
> + struct device_node *np = to_of_node(child);
>
> - if (of_property_read_bool(child, "gpio-controller")) {
> - bank->rstc = of_reset_control_get_exclusive(child,
> - NULL);
> - if (PTR_ERR(bank->rstc) == -EPROBE_DEFER) {
> - of_node_put(child);
> - return -EPROBE_DEFER;
> - }
> -
> - bank->clk = of_clk_get_by_name(child, NULL);
> - if (IS_ERR(bank->clk)) {
> - if (PTR_ERR(bank->clk) != -EPROBE_DEFER)
> - dev_err(dev,
> - "failed to get clk (%ld)\n",
> - PTR_ERR(bank->clk));
> - of_node_put(child);
> - return PTR_ERR(bank->clk);
> - }
> - i++;
> + bank->rstc = of_reset_control_get_exclusive(np, NULL);
> + if (PTR_ERR(bank->rstc) == -EPROBE_DEFER) {
> + fwnode_handle_put(child);
> + return -EPROBE_DEFER;
> }
> - }
>
> - for_each_available_child_of_node(np, child) {
> - if (of_property_read_bool(child, "gpio-controller")) {
> - ret = stm32_gpiolib_register_bank(pctl, child);
> - if (ret) {
> - of_node_put(child);
> - return ret;
> - }
> + bank->clk = of_clk_get_by_name(np, NULL);
> + if (IS_ERR(bank->clk)) {
> + if (PTR_ERR(bank->clk) != -EPROBE_DEFER)
> + dev_err(dev, "failed to get clk (%ld)\n", PTR_ERR(bank->clk));
> + fwnode_handle_put(child);
> + return PTR_ERR(bank->clk);
> + }
> + i++;
> + }
>
> - pctl->nbanks++;
> + for_each_gpiochip_node(dev, child) {
> + ret = stm32_gpiolib_register_bank(pctl, child);
> + if (ret) {
> + fwnode_handle_put(child);
> + return ret;
> }
> +
> + pctl->nbanks++;
> }
>
> dev_info(dev, "Pinctrl STM32 initialized\n");
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