lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <d78d3bde-cddb-6f0a-69ab-a51ded812f81@microchip.com>
Date:   Wed, 30 Mar 2022 13:25:54 +0000
From:   <Claudiu.Beznea@...rochip.com>
To:     <michael@...le.cc>, <Kavyasree.Kotagiri@...rochip.com>,
        <Nicolas.Ferre@...rochip.com>
CC:     <arnd@...db.de>, <olof@...om.net>, <soc@...nel.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <robh+dt@...nel.org>, <krzysztof.kozlowski@...onical.com>,
        <alexandre.belloni@...tlin.com>
Subject: Re: [PATCH v2 4/7] ARM: dts: lan966x: add all flexcom usart nodes

On 04.03.2022 17:35, Michael Walle wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> 
> Add all the remaining usart nodes for the flexcom block. Although the
> DMA channels are specified, DMA is not enabled by default because break
> detection doesn't work with DMA.
> 
> Keep the nodes disabled by default.
> 
> Signed-off-by: Michael Walle <michael@...le.cc>

Reviewed-by: Claudiu Beznea <claudiu.beznea@...rochip.com>


> ---
>  arch/arm/boot/dts/lan966x.dtsi | 52 ++++++++++++++++++++++++++++++++++
>  1 file changed, 52 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/lan966x.dtsi b/arch/arm/boot/dts/lan966x.dtsi
> index 230de3bdd5f1..d7eacb0144f5 100644
> --- a/arch/arm/boot/dts/lan966x.dtsi
> +++ b/arch/arm/boot/dts/lan966x.dtsi
> @@ -92,6 +92,19 @@ flx0: flexcom@...40000 {
>                         #size-cells = <1>;
>                         ranges = <0x0 0xe0040000 0x800>;
>                         status = "disabled";
> +
> +                       usart0: serial@200 {
> +                               compatible = "atmel,at91sam9260-usart";
> +                               reg = <0x200 0x200>;
> +                               interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
> +                               dmas = <&dma0 AT91_XDMAC_DT_PERID(3)>,
> +                                      <&dma0 AT91_XDMAC_DT_PERID(2)>;
> +                               dma-names = "tx", "rx";
> +                               clocks = <&nic_clk>;
> +                               clock-names = "usart";
> +                               atmel,fifo-size = <32>;
> +                               status = "disabled";
> +                       };
>                 };
> 
>                 flx1: flexcom@...44000 {
> @@ -102,6 +115,19 @@ flx1: flexcom@...44000 {
>                         #size-cells = <1>;
>                         ranges = <0x0 0xe0044000 0x800>;
>                         status = "disabled";
> +
> +                       usart1: serial@200 {
> +                               compatible = "atmel,at91sam9260-usart";
> +                               reg = <0x200 0x200>;
> +                               interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
> +                               dmas = <&dma0 AT91_XDMAC_DT_PERID(5)>,
> +                                      <&dma0 AT91_XDMAC_DT_PERID(4)>;
> +                               dma-names = "tx", "rx";
> +                               clocks = <&nic_clk>;
> +                               clock-names = "usart";
> +                               atmel,fifo-size = <32>;
> +                               status = "disabled";
> +                       };
>                 };
> 
>                 trng: rng@...48000 {
> @@ -129,6 +155,19 @@ flx2: flexcom@...60000 {
>                         #size-cells = <1>;
>                         ranges = <0x0 0xe0060000 0x800>;
>                         status = "disabled";
> +
> +                       usart2: serial@200 {
> +                               compatible = "atmel,at91sam9260-usart";
> +                               reg = <0x200 0x200>;
> +                               interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
> +                               dmas = <&dma0 AT91_XDMAC_DT_PERID(7)>,
> +                                      <&dma0 AT91_XDMAC_DT_PERID(6)>;
> +                               dma-names = "tx", "rx";
> +                               clocks = <&nic_clk>;
> +                               clock-names = "usart";
> +                               atmel,fifo-size = <32>;
> +                               status = "disabled";
> +                       };
>                 };
> 
>                 flx3: flexcom@...64000 {
> @@ -181,6 +220,19 @@ flx4: flexcom@...70000 {
>                         #size-cells = <1>;
>                         ranges = <0x0 0xe0070000 0x800>;
>                         status = "disabled";
> +
> +                       usart4: serial@200 {
> +                               compatible = "atmel,at91sam9260-usart";
> +                               reg = <0x200 0x200>;
> +                               interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
> +                               dmas = <&dma0 AT91_XDMAC_DT_PERID(11)>,
> +                                      <&dma0 AT91_XDMAC_DT_PERID(10)>;
> +                               dma-names = "tx", "rx";
> +                               clocks = <&nic_clk>;
> +                               clock-names = "usart";
> +                               atmel,fifo-size = <32>;
> +                               status = "disabled";
> +                       };
>                 };
> 
>                 timer0: timer@...8c000 {
> --
> 2.30.2
> 

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ