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Message-Id: <20220401074517.1848264-1-ricardo.canuelo@collabora.com>
Date: Fri, 1 Apr 2022 09:45:17 +0200
From: Ricardo Cañuelo <ricardo.canuelo@...labora.com>
To: linux-kernel@...r.kernel.org
Cc: Ricardo Cañuelo <ricardo.canuelo@...labora.com>,
Borislav Petkov <bp@...en8.de>,
Thadeu Lima de Souza Cascardo <cascardo@...onical.com>,
Mark Gross <mgross@...ux.intel.com>, x86@...nel.org,
"H. Peter Anvin" <hpa@...or.com>, Ingo Molnar <mingo@...hat.com>,
Thomas Gleixner <tglx@...utronix.de>,
John Johansen <john.johansen@...onical.com>,
Steve Beattie <sbeattie@...ntu.com>, kernel@...labora.com
Subject: [PATCH v3] x86/speculation/srbds: do not try to turn mitigation off when not supported
When SRBDS is mitigated by TSX OFF, update_srbds_msr will still read and
write to MSR_IA32_MCU_OPT_CTRL even when that is not supported by the
microcode.
Checking for X86_FEATURE_SRBDS_CTRL as a CPU feature available makes
more sense than checking for SRBDS_MITIGATION_UCODE_NEEDED as the found
"mitigation".
Signed-off-by: Thadeu Lima de Souza Cascardo <cascardo@...onical.com>
Signed-off-by: Borislav Petkov <bp@...en8.de>
Signed-off-by: Ricardo Cañuelo <ricardo.canuelo@...labora.com>
Tested-by: Ricardo Cañuelo <ricardo.canuelo@...labora.com>
---
Changes in v3:
- Simplified and more explicit solution proposed by Boris
arch/x86/kernel/cpu/bugs.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c
index 6296e1ebed1d..d879a6c93609 100644
--- a/arch/x86/kernel/cpu/bugs.c
+++ b/arch/x86/kernel/cpu/bugs.c
@@ -446,6 +446,13 @@ void update_srbds_msr(void)
if (srbds_mitigation == SRBDS_MITIGATION_UCODE_NEEDED)
return;
+ /*
+ * A MDS_NO CPU for which SRBDS mitigation is not needed due to TSX
+ * being disabled and it hasn't received the SRBDS MSR microcode.
+ */
+ if (!boot_cpu_has(X86_FEATURE_SRBDS_CTRL))
+ return;
+
rdmsrl(MSR_IA32_MCU_OPT_CTRL, mcu_ctrl);
switch (srbds_mitigation) {
--
2.25.1
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