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Message-Id: <20220401103604.8705-8-andriy.shevchenko@linux.intel.com>
Date: Fri, 1 Apr 2022 13:35:58 +0300
From: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
To: Qianggui Song <qianggui.song@...ogic.com>,
Andy Shevchenko <andriy.shevchenko@...ux.intel.com>,
Geert Uytterhoeven <geert+renesas@...der.be>,
Krzysztof Kozlowski <krzk@...nel.org>,
Marc Zyngier <maz@...nel.org>,
Fabien Dessenne <fabien.dessenne@...s.st.com>,
Linus Walleij <linus.walleij@...aro.org>,
linux-gpio@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-amlogic@...ts.infradead.org, linux-kernel@...r.kernel.org,
openbmc@...ts.ozlabs.org, linux-renesas-soc@...r.kernel.org,
linux-samsung-soc@...r.kernel.org,
linux-stm32@...md-mailman.stormreply.com
Cc: Neil Armstrong <narmstrong@...libre.com>,
Kevin Hilman <khilman@...libre.com>,
Jerome Brunet <jbrunet@...libre.com>,
Martin Blumenstingl <martin.blumenstingl@...glemail.com>,
Andrew Lunn <andrew@...n.ch>,
Gregory Clement <gregory.clement@...tlin.com>,
Sebastian Hesselbarth <sebastian.hesselbarth@...il.com>,
Avi Fishman <avifishman70@...il.com>,
Tomer Maimon <tmaimon77@...il.com>,
Tali Perry <tali.perry1@...il.com>,
Patrick Venture <venture@...gle.com>,
Nancy Yuen <yuenn@...gle.com>,
Benjamin Fair <benjaminfair@...gle.com>,
Tomasz Figa <tomasz.figa@...il.com>,
Sylwester Nawrocki <s.nawrocki@...sung.com>,
Alim Akhtar <alim.akhtar@...sung.com>,
Maxime Coquelin <mcoquelin.stm32@...il.com>,
Alexandre Torgue <alexandre.torgue@...s.st.com>,
Bartosz Golaszewski <brgl@...ev.pl>,
Philipp Zabel <p.zabel@...gutronix.de>
Subject: [PATCH v4 07/13] pinctrl: renesas: rza1: Switch to use for_each_gpiochip_node() helper
Switch the code to use for_each_gpiochip_node() helper.
While at it, in order to avoid additional churn in the future,
switch to fwnode APIs where it makes sense.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@...der.be>
Tested-by: Geert Uytterhoeven <geert+renesas@...der.be>
Acked-by: Geert Uytterhoeven <geert+renesas@...der.be>
---
drivers/pinctrl/renesas/pinctrl-rza1.c | 30 +++++++++++---------------
1 file changed, 13 insertions(+), 17 deletions(-)
diff --git a/drivers/pinctrl/renesas/pinctrl-rza1.c b/drivers/pinctrl/renesas/pinctrl-rza1.c
index acc00b1a955d..529c0fc4ec06 100644
--- a/drivers/pinctrl/renesas/pinctrl-rza1.c
+++ b/drivers/pinctrl/renesas/pinctrl-rza1.c
@@ -24,6 +24,7 @@
#include <linux/pinctrl/pinconf-generic.h>
#include <linux/pinctrl/pinctrl.h>
#include <linux/pinctrl/pinmux.h>
+#include <linux/property.h>
#include <linux/slab.h>
#include "../core.h"
@@ -1161,22 +1162,22 @@ static const struct pinmux_ops rza1_pinmux_ops = {
* defined by gpio device tree binding documentation.
*
* @rza1_pctl: RZ/A1 pin controller device
- * @np: of gpio-controller node
+ * @fwnode: gpio-controller firmware node
* @chip: gpio chip to register to gpiolib
* @range: pin range to register to pinctrl core
*/
static int rza1_parse_gpiochip(struct rza1_pinctrl *rza1_pctl,
- struct device_node *np,
+ struct fwnode_handle *fwnode,
struct gpio_chip *chip,
struct pinctrl_gpio_range *range)
{
const char *list_name = "gpio-ranges";
- struct of_phandle_args of_args;
+ struct fwnode_reference_args args;
unsigned int gpioport;
u32 pinctrl_base;
int ret;
- ret = of_parse_phandle_with_fixed_args(np, list_name, 3, 0, &of_args);
+ ret = fwnode_property_get_reference_args(fwnode, list_name, NULL, 3, 0, &args);
if (ret) {
dev_err(rza1_pctl->dev, "Unable to parse %s list property\n",
list_name);
@@ -1187,7 +1188,7 @@ static int rza1_parse_gpiochip(struct rza1_pinctrl *rza1_pctl,
* Find out on which port this gpio-chip maps to by inspecting the
* second argument of the "gpio-ranges" property.
*/
- pinctrl_base = of_args.args[1];
+ pinctrl_base = args.args[1];
gpioport = RZA1_PIN_ID_TO_PORT(pinctrl_base);
if (gpioport >= RZA1_NPORTS) {
dev_err(rza1_pctl->dev,
@@ -1197,19 +1198,18 @@ static int rza1_parse_gpiochip(struct rza1_pinctrl *rza1_pctl,
*chip = rza1_gpiochip_template;
chip->base = -1;
- chip->label = devm_kasprintf(rza1_pctl->dev, GFP_KERNEL, "%pOFn",
- np);
+ chip->ngpio = args.args[2];
+ chip->label = devm_kasprintf(rza1_pctl->dev, GFP_KERNEL, "%pfwP", fwnode);
if (!chip->label)
return -ENOMEM;
- chip->ngpio = of_args.args[2];
- chip->of_node = np;
+ chip->fwnode = fwnode;
chip->parent = rza1_pctl->dev;
range->id = gpioport;
range->name = chip->label;
range->pin_base = range->base = pinctrl_base;
- range->npins = of_args.args[2];
+ range->npins = args.args[2];
range->gc = chip;
ret = devm_gpiochip_add_data(rza1_pctl->dev, chip,
@@ -1232,10 +1232,9 @@ static int rza1_parse_gpiochip(struct rza1_pinctrl *rza1_pctl,
*/
static int rza1_gpio_register(struct rza1_pinctrl *rza1_pctl)
{
- struct device_node *np = rza1_pctl->dev->of_node;
struct pinctrl_gpio_range *gpio_ranges;
struct gpio_chip *gpio_chips;
- struct device_node *child;
+ struct fwnode_handle *child;
unsigned int ngpiochips;
unsigned int i;
int ret;
@@ -1254,14 +1253,11 @@ static int rza1_gpio_register(struct rza1_pinctrl *rza1_pctl)
return -ENOMEM;
i = 0;
- for_each_child_of_node(np, child) {
- if (!of_property_read_bool(child, "gpio-controller"))
- continue;
-
+ for_each_gpiochip_node(rza1_pctl->dev, child) {
ret = rza1_parse_gpiochip(rza1_pctl, child, &gpio_chips[i],
&gpio_ranges[i]);
if (ret) {
- of_node_put(child);
+ fwnode_handle_put(child);
return ret;
}
--
2.35.1
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