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Date: Mon, 4 Apr 2022 09:41:42 +0530 From: Mayuresh Chitale <mchitale@...tanamicro.com> To: Anup Patel <apatel@...tanamicro.com> Cc: Paolo Bonzini <pbonzini@...hat.com>, Atish Patra <atishp@...shpatra.org>, Palmer Dabbelt <palmer@...belt.com>, Paul Walmsley <paul.walmsley@...ive.com>, Albert Ou <aou@...s.berkeley.edu>, Alistair Francis <Alistair.Francis@....com>, Anup Patel <anup@...infault.org>, kvm@...r.kernel.org, kvm-riscv@...ts.infradead.org, linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org Subject: Re: [PATCH 0/3] Unexpected guest trap handling for KVM RISC-V selftests On Tue, Mar 29, 2022 at 1:00 PM Anup Patel <apatel@...tanamicro.com> wrote: > > Getting unexpected guest traps while running KVM RISC-V selftests should > cause the test to fail appropriately with VCPU register dump. This series > improves handling of unexpected traps along these lines. > > These patches can also be found in riscv_kvm_selftests_unexp_trap_v1 branch > at: https://github.com/avpatel/linux.git > > Anup Patel (3): > KVM: selftests: riscv: Set PTE A and D bits in VS-stage page table > KVM: selftests: riscv: Fix alignment of the guest_hang() function > KVM: selftests: riscv: Improve unexpected guest trap handling > > .../selftests/kvm/include/riscv/processor.h | 12 ++++--- > .../selftests/kvm/lib/riscv/processor.c | 9 +++--- > tools/testing/selftests/kvm/lib/riscv/ucall.c | 31 +++++++++++++------ > 3 files changed, 34 insertions(+), 18 deletions(-) > > -- > 2.25.1 > > > _______________________________________________ > linux-riscv mailing list > linux-riscv@...ts.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-riscv I have tested the series on Qemu. Tested-by: Mayuresh Chitale <mchitale@...tanamicro.com>
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