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Message-Id: <20220405070412.327169580@linuxfoundation.org>
Date: Tue, 5 Apr 2022 09:25:21 +0200
From: Greg Kroah-Hartman <gregkh@...uxfoundation.org>
To: linux-kernel@...r.kernel.org
Cc: Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
stable@...r.kernel.org,
Khaled Almahallawy <khaled.almahallawy@...el.com>,
Charlton Lin <charlton.lin@...el.com>,
Jouni Högander <jouni.hogander@...el.com>,
José Roberto de Souza <jose.souza@...el.com>,
Joonas Lahtinen <joonas.lahtinen@...ux.intel.com>,
Sasha Levin <sashal@...nel.org>
Subject: [PATCH 5.16 0608/1017] drm/i915/display: Do not re-enable PSR after it was marked as not reliable
From: José Roberto de Souza <jose.souza@...el.com>
[ Upstream commit 278da06c03655c2bb9bc36ebdf45b90a079b3bfd ]
If a error happens and sink_not_reliable is set, PSR should be disabled
for good but that is not happening.
It would be disabled by the function handling the PSR error but then
on the next fastset it would be enabled again in
_intel_psr_post_plane_update().
It would only be disabled for good in the next modeset where has_psr
will be set false.
v2:
- release psr lock before continue
Fixes: 9ce5884e5139 ("drm/i915/display: Only keep PSR enabled if there is active planes")
Reported-by: Khaled Almahallawy <khaled.almahallawy@...el.com>
Reported-by: Charlton Lin <charlton.lin@...el.com>
Cc: Jouni Högander <jouni.hogander@...el.com>
Signed-off-by: José Roberto de Souza <jose.souza@...el.com>
Reviewed-by: Jouni Högander <jouni.hogander@...el.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220311185149.110527-2-jose.souza@intel.com
(cherry picked from commit 15f26bdc81f7f03561aaea5a10d87bd6638e1459)
Signed-off-by: Joonas Lahtinen <joonas.lahtinen@...ux.intel.com>
Signed-off-by: Sasha Levin <sashal@...nel.org>
---
drivers/gpu/drm/i915/display/intel_psr.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 3ba8b717e176..f7ade9c06386 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -1793,6 +1793,9 @@ static void _intel_psr_post_plane_update(const struct intel_atomic_state *state,
mutex_lock(&psr->lock);
+ if (psr->sink_not_reliable)
+ goto exit;
+
drm_WARN_ON(&dev_priv->drm, psr->enabled && !crtc_state->active_planes);
/* Only enable if there is active planes */
@@ -1803,6 +1806,7 @@ static void _intel_psr_post_plane_update(const struct intel_atomic_state *state,
if (crtc_state->crc_enabled && psr->enabled)
psr_force_hw_tracking_exit(intel_dp);
+exit:
mutex_unlock(&psr->lock);
}
}
--
2.34.1
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